发明授权
US06780749B2 Method of manufacturing a semiconductor chip comprising multiple bonding pads in staggard rows on edges 有权
制造半导体芯片的方法,该半导体芯片包括边缘上交错排列的多个焊盘

  • 专利标题: Method of manufacturing a semiconductor chip comprising multiple bonding pads in staggard rows on edges
  • 专利标题(中): 制造半导体芯片的方法,该半导体芯片包括边缘上交错排列的多个焊盘
  • 申请号: US10414847
    申请日: 2003-04-16
  • 公开(公告)号: US06780749B2
    公开(公告)日: 2004-08-24
  • 发明人: Kenji MasumotoMutsumi MasumotoAkira Karashima
  • 申请人: Kenji MasumotoMutsumi MasumotoAkira Karashima
  • 优先权: JP2000-224975 20000726
  • 主分类号: H01L2144
  • IPC分类号: H01L2144
Method of manufacturing a semiconductor chip comprising multiple bonding pads in staggard rows on edges
摘要:
In semiconductor device 10 under this invention, bonding pads 20 are lined up in a staggered pattern on the main surface of semiconductor chip 14 which is mounted on insulated substrate 12. Multiple stud bumps are stacked on top of the pads 20a which are located on the inner rows, and these stud bumps comprise stud bump stack 28. Conductive wire 22 connects the lands 18 on the insulated substrate with the corresponding bonding pads 20. The wire is formed with its beginning at the land and its end at the bonding pad. Via the stud bump stacks 28, the ends of conductive wire 22a on the inner pads are in a higher position than the ends of conductive wires 22b on the outer pads, so that the problem of neighboring conductive wires coming into contact does not occur.
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