发明授权
- 专利标题： Semiconductor device having wiring patterns with insulating layer
- 专利标题（中）： 具有绝缘层布线图案的半导体装置
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申请号： US10128244申请日： 2002-04-24
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公开(公告)号： US06781216B2公开(公告)日： 2004-08-24
- 发明人: Hiroki Nakamura
- 申请人： Hiroki Nakamura
- 优先权： JP11-369811 19991227
- 主分类号： H01L21312
- IPC分类号： H01L21312
摘要：
A semiconductor device includes a semiconductor substrate having a center area where an IC is formed and a peripheral area surrounding the center area, a first wiring pattern formed on the substrate in the center area, a second wiring pattern formed in the peripheral area wherein the second wiring pattern encompasses the center area, a first insulating layer formed over the center and peripheral areas, and a second insulating layer formed on the first insulating layer which is formed on the semiconductor substrate wherein the second insulating layer is not formed over the second wiring pattern.
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