Invention Grant
US06787439B2 Method using planarizing gate material to improve gate critical dimension in semiconductor devices 有权
使用平面化栅极材料来改善半导体器件中的栅极临界尺寸的方法

Method using planarizing gate material to improve gate critical dimension in semiconductor devices
Abstract:
A method of manufacturing a semiconductor device may include forming a fin structure on an insulator. The fin structure may include side surfaces and a top surface. The method may also include depositing a gate material over the fin structure and planarizing the deposited gate material. An antireflective coating may be deposited on the planarized gate material, and a gate structure may be formed out of the planarized gate material using the antireflective coating.
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