发明授权
US06790722B1 Logic SOI structure, process and application for vertical bipolar transistor
有权
逻辑SOI结构，工艺和应用于垂直双极晶体管
- 专利标题： Logic SOI structure, process and application for vertical bipolar transistor
- 专利标题（中）： 逻辑SOI结构，工艺和应用于垂直双极晶体管
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申请号： US09718850申请日： 2000-11-22
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公开(公告)号： US06790722B1公开(公告)日： 2004-09-14
- 发明人: Ramachandra Divakaruni , Russell J. Houghton , Jack A. Mandelman , Wilbur D. Pricer , William R. Tonti
- 申请人： Ramachandra Divakaruni , Russell J. Houghton , Jack A. Mandelman , Wilbur D. Pricer , William R. Tonti
- 主分类号： H01L218238
- IPC分类号： H01L218238
摘要：
A method and structure for forming an emitter in a vertical bipolar transistor includes providing a substrate having a collector layer and a base layer over the collector layer, forming a patterning mask over the collector layer, and filling openings in the mask with emitter material in a damascene process. The CMOS/vertical bipolar structure has the collector, base regions, and emitter regions vertically disposed on one another, the collector region having a peak dopant concentration adjacent the inter-substrate isolation oxide.
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