发明授权
- 专利标题: System level in-situ integrated dielectric etch process particularly useful for copper dual damascene
- 专利标题(中): 系统级原位集成电介质蚀刻工艺特别适用于铜双镶嵌
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申请号: US10280664申请日: 2002-10-24
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公开(公告)号: US06793835B2公开(公告)日: 2004-09-21
- 发明人: Lee Luo , Claes H. Bjorkman , Brian Sy Yuan Shieh , Gerald Zheyao Yin
- 申请人: Lee Luo , Claes H. Bjorkman , Brian Sy Yuan Shieh , Gerald Zheyao Yin
- 主分类号: H01L21302
- IPC分类号: H01L21302
摘要:
An integrated in situ etch process performed in a multichamber substrate processing system having first and second etching chambers. The process includes transferring a substrate having formed thereon in a downward direction a patterned photoresist mask, a dielectric layer, a stop layer and a feature in the substrate to be contacted into the first etching chamber to etch the dielectric layer. The substrate is then transferred from the first etching chamber to the second etching chamber under vacuum conditions and, in the second etching chamber, is exposed to an oxygen plasma or similar environment to strip away the photoresist mask deposited over the substrate. After the photoresist mask is stripped, the stop layer is etched through to the feature to be contacted in either the second or a third etching chamber of said multichamber substrate processing system. All three etching steps are performed in a system level in situ process so that the substrate is not exposed to an ambient between steps.
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