A floating gate memory architecture having current regulator is disclosed. A floating gate memory block have at least a programming voltage node for being programmed a plurality of bits according to the control of a plurality of bit lines. A high voltage source provides a regulated voltage when the plurality of bits are programmed in. A high voltage decoder locates between the floating gate memory block and the high voltage source for connecting the voltage to the programming voltage node according to the programming data of the floating gate memory block. A current regulator connects to the programming voltage node for keeping the programming voltage node in a constant voltage, and making a constant current flowing into said floating gate memory block according to said plurality of bits.