Invention Grant
US06795352B2 Nonvolatile semiconductor memory having page mode with a plurality of banks
失效
具有多个存储体的页面模式的非易失性半导体存储器
- Patent Title: Nonvolatile semiconductor memory having page mode with a plurality of banks
- Patent Title (中): 具有多个存储体的页面模式的非易失性半导体存储器
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Application No.: US10703005Application Date: 2003-11-05
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Publication No.: US06795352B2Publication Date: 2004-09-21
- Inventor: Toru Tanzawa , Shigeru Atsumi , Akira Umezawa , Tadayuki Taura , Hitoshi Shiga , Yoshinori Takano
- Applicant: Toru Tanzawa , Shigeru Atsumi , Akira Umezawa , Tadayuki Taura , Hitoshi Shiga , Yoshinori Takano
- Priority: JP2001-265022 20010831
- Main IPC: G11C1604
- IPC: G11C1604

Abstract:
The semiconductor memory comprises a reference current generator, first and second current converters, sense amplifiers for read, and sense amplifiers for verify. The reference current generator generates a first voltage dependent upon the current flowing through a reference cell. The first current converters, to which the first voltage is input, each generate a second voltage. The second current converters, to which the first voltage is input, each generate a third voltage. The sense amplifiers for read output data of a selection memory cell, comparing the voltage of the data-line for read with the second voltage. The sense amplifiers for verify output verify data of the selection memory cell, comparing the voltage of the data-lines for verify and the third voltage.
Public/Granted literature
- US20040090851A1 Nonvolatile semiconductor memory having page mode with a plurality of banks Public/Granted day:2004-05-13
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