- 专利标题: Sacrificial deposition layer as screening material for implants into a wafer during the manufacture of a semiconductor device
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申请号: US10232980申请日: 2002-08-29
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公开(公告)号: US06797596B2公开(公告)日: 2004-09-28
- 发明人: Fawad Ahmed , Jigish D. Trivedi , Suraj J Mathew
- 申请人: Fawad Ahmed , Jigish D. Trivedi , Suraj J Mathew
- 主分类号: H01L21425
- IPC分类号: H01L21425
摘要:
A method used during the formation of a semiconductor device reduces ion channeling during implantation of the wafer. The method comprises providing a semiconductor wafer and an unetched transistor gate stack assembly over the wafer. The unetched transistor gate stack assembly comprises a gate oxide layer, a control gate layer, a metal layer, and a dielectric capping layer. A patterned photoresist layer is formed over the unetched transistor gate stack assembly, then each of the capping layer, the metal layer, the control gate layer, and the gate oxide layer is etched to form a plurality of laterally-spaced transistor gate stacks. A screening layer is formed overlying the semiconductor wafer between the transistor gate stacks. A dopant is implanted into the semiconductor wafer through the screening layer, then the screening layer is removed.
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