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US06798236B2 Output buffer circuit with power supply voltages different from a power supply voltage applied to an internal circuit 失效
输出缓冲电路，其电源电压不同于施加到内部电路的电源电压

  • 专利标题： Output buffer circuit with power supply voltages different from a power supply voltage applied to an internal circuit
  • 专利标题（中）： 输出缓冲电路，其电源电压不同于施加到内部电路的电源电压
  • 申请号： US10271799
    申请日： 2002-10-17
  • 公开(公告)号： US06798236B2
    公开(公告)日： 2004-09-28
  • 发明人: Tadayuki Shimizu , Takafumi Takatsuka , Masaki Tsukude
  • 申请人： Tadayuki Shimizu , Takafumi Takatsuka , Masaki Tsukude
  • 优先权： JP2002-110784 20020412
  • 主分类号： H03K19003
  • IPC分类号： H03K19003
Output buffer circuit with power supply voltages different from a power supply voltage applied to an internal circuit
摘要：
A semiconductor integrated circuit which is supplied with a first power supply voltage and a second power supply voltage from outside so as to operate incorporated circuits, and outputs data at an output terminal, includes an internal circuit that carries out a predetermined function for an input signal, an output circuit which includes a first circuit for converting the signal from the internal circuit into an output signal and a second circuit containing a final stage buffer circuit which outputs, depending on the signal from the first circuit, data to the output terminal; and a switching circuit that switches a power supply voltage supplied to the second circuit, to either the first power supply voltage or the second power supply voltage. A voltage obtained by decreasing the first power supply voltage is supplied to the internal circuit. The first power supply voltage is supplied to the first circuit.
摘要（中）：

一种半导体集成电路，其从外部提供第一电源电压和第二电源电压，以便操作并入的电路，并且在输出端子处输出数据，包括执行用于输入信号的预定功能的内部电路 输出电路，其包括用于将来自内部电路的信号转换为输出信号的第一电路和包含最终级缓冲电路的第二电路，其根据来自第一电路的信号将数据输出到输出端; 以及将提供给第二电路的电源电压切换到第一电源电压或第二电源电压的开关电路。 通过减小第一电源电压获得的电压被提供给内部电路。 第一电源电压被提供给第一电路。

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