Invention Grant
- Patent Title: Circuit for asynchronous reset in current mode logic circuits
- Patent Title (中): 电流模式逻辑电路中的异步复位电路
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Application No.: US10303974Application Date: 2002-11-26
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Publication No.: US06798249B2Publication Date: 2004-09-28
- Inventor: Tak Ying Wong , David Ho , Wee Teck Lee , Khim Leng Low
- Applicant: Tak Ying Wong , David Ho , Wee Teck Lee , Khim Leng Low
- Main IPC: H03K19094
- IPC: H03K19094
Abstract:
A current mode logic (CML) flip flop includes a first CML latch and a second CML latch. A plurality of pull-up switches are responsive to a reset signal. Outputs of the first and second CML latches are pulled up to a supply voltage through the pull-up switches. The first CML latch includes a first pull-up isolation switch driven by the reset signal for resetting the latch.
Public/Granted literature
- US20040100307A1 Circuit for asychronous reset in current mode logic circuits Public/Granted day:2004-05-27
Information query
