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发明授权
US06798276B2 Reduced potential generation circuit operable at low power-supply potential 失效
减少在低电源电位下工作的电位产生电路

  • 专利标题： Reduced potential generation circuit operable at low power-supply potential
  • 专利标题（中）： 减少在低电源电位下工作的电位产生电路
  • 申请号： US10217408
    申请日： 2002-08-14
  • 公开(公告)号： US06798276B2
    公开(公告)日： 2004-09-28
  • 发明人: Katsuhiro Mori , Shinya Fujioka , Jun Ohno
  • 申请人： Katsuhiro Mori , Shinya Fujioka , Jun Ohno
  • 优先权： JP2001-364683 20011129
  • 主分类号： G05F110
  • IPC分类号： G05F110
Reduced potential generation circuit operable at low power-supply potential
摘要：
A power supply circuit includes a first NMOS-type current mirror circuit which compares a first potential with a second potential, a second NMOS-type current mirror circuit which compares the first potential with a third potential, and a potential setting circuit which adjusts the first potential in response to outputs of the first and second NMOS-type current mirror circuits, such that the first potential falls between the second potential and the third potential.
摘要（中）：

电源电路包括将第一电位与第二电位进行比较的第一NMOS型电流镜电路和将第一电位与第三电位进行比较的第二NMOS型电流镜电路和调整第一电位的电位设定电路 响应于第一和第二NMOS型电流镜电路的输出的电位，使得第一电位落在第二电位和第三电位之间。

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