Overvoltage protection circuits include a pass transistor having first and second current carrying terminals electrically connected to an input signal line and an output signal line, respectively, and a voltage clamping circuit. The voltage clamping circuit is electrically connected to a power supply line and a gate of the pass-transistor and dynamically clamps a capacitively bootstrapped voltage at a gate of the pass transistor within a first range so that the output voltage as well as the magnitudes of all gate-to-source, gate-to-drain and drain-to-source voltages across the pass transistor and all transistors within the voltage clamping circuit do not exceed a level in excess of about Vdd when Vin=2Vdd, where Vin equals a voltage of an input signal applied to the input signal line and Vdd equals a power supply voltage on the power supply line.