发明授权
US06800506B1 Method of making a bumped terminal in a laminated structure for a semiconductor chip assembly
失效
在半导体芯片组件的叠层结构中制造凸起端子的方法
- 专利标题: Method of making a bumped terminal in a laminated structure for a semiconductor chip assembly
- 专利标题(中): 在半导体芯片组件的叠层结构中制造凸起端子的方法
-
申请号: US10156469申请日: 2002-05-28
-
公开(公告)号: US06800506B1公开(公告)日: 2004-10-05
- 发明人: Charles W. C. Lin , Cheng-Lien Chiang
- 申请人: Charles W. C. Lin , Cheng-Lien Chiang
- 主分类号: H01L2144
- IPC分类号: H01L2144
摘要:
A method of making a semiconductor chip assembly includes providing a semiconductor chip and a laminated structure, wherein the chip includes a conductive pad, the laminated structure includes a conductive trace, an insulative base and a metal base, the conductive trace includes a routing line and a bumped terminal, the metal base and the routing line are disposed on opposite sides of the insulative base, and the bumped terminal includes a cavity that extends through the insulative base and into the metal base, removing a portion of the metal base that contacts the bumped terminal, and forming a connection joint that contacts and electrically connects the conductive trace and the pad.
信息查询