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1.发明授权Method of connecting an additively and subtractively formed conductive trace and an insulative base to a semiconductor chip 失效将加法和减法形成的导电迹线和绝缘基底连接到半导体芯片的方法公开(公告)号：US06984576B1
公开(公告)日：2006-01-10
申请号：US10356800
申请日：2003-02-01
IPC分类号： H01L21/44
CPC分类号： H01L23/5389 , H01L2224/04105 , H01L2224/11 , H01L2224/1134 , H01L2224/11474 , H01L2224/12 , H01L2224/12105 , H01L2224/13099 , H01L2224/19 , H01L2224/32225 , H01L2224/45124 , H01L2224/45144 , H01L2224/82039 , H01L2224/82047 , H01L2224/92144 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01012 , H01L2924/01013 , H01L2924/01015 , H01L2924/01019 , H01L2924/01022 , H01L2924/01024 , H01L2924/01029 , H01L2924/0103 , H01L2924/01033 , H01L2924/0104 , H01L2924/01046 , H01L2924/01047 , H01L2924/01052 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01327 , H01L2924/014 , H01L2924/09701 , H01L2924/10253 , H01L2924/14 , H01L2924/181 , H01L2924/3025 , H01L2924/351 , H01L2924/3511 , H01L2924/3512 , H05K3/4046 , H01L2924/00 , H01L2224/48 , H01L2924/00012
摘要： A method of connecting a conductive trace and an insulative base to a semiconductor chip includes providing a semiconductor chip, a metal base, an insulative base, a routing line and an interconnect, wherein the chip includes a conductive pad, the metal base is disposed on a side of the insulative base that faces away from the chip, the routing line is disposed on a side of the insulative base that faces towards the chip, and the interconnect extends through a via in the insulative base and electrically connects the metal base and the routing line, forming an opening that extends through the insulative base and exposes the pad, forming a connection joint that electrically connects the routing line and the pad, and etching the metal base such that an unetched portion of the metal base forms a pillar that overlaps and is aligned with the via and contacts the interconnect, wherein a conductive trace includes the routing line, the interconnect and the pillar. Preferably, the opening extends through an insulative adhesive that attaches the routing line to the chip.
摘要翻译： 将导电迹线和绝缘基底连接到半导体芯片的方法包括提供半导体芯片，金属基底，绝缘基底，布线线和互连件，其中芯片包括导电垫，金属基底设置在 所述绝缘基板的远离所述芯片的一侧，所述布线线设置在所述绝缘基板的面向所述芯片的一侧，并且所述互连件延伸穿过所述绝缘基座中的通孔，并且电连接所述金属基座 形成一个延伸穿过绝缘基座并露出焊盘的开口，形成一个使导线与焊盘电连接的连接接头，并蚀刻金属基座，使金属基座的未蚀刻部分形成一个重叠的支柱 并且与通孔对齐并接触互连，其中导电迹线包括布线线，互连件和支柱。 优选地，开口延伸穿过将路由线连接到芯片的绝缘粘合剂。
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2.发明授权Method of connecting a conductive trace and an insulative base to a semiconductor chip using multiple etch steps 失效使用多个蚀刻步骤将导电迹线和绝缘基底连接到半导体芯片的方法公开(公告)号：US06949408B1
公开(公告)日：2005-09-27
申请号：US10356372
申请日：2003-02-01
IPC分类号： H01L21/44 , H01L21/48 , H01L21/50 , H01L23/31 , H01L23/485 , H01L23/498
CPC分类号： H01L24/18 , H01L23/3128 , H01L23/4985 , H01L24/11 , H01L24/13 , H01L2224/05001 , H01L2224/05024 , H01L2224/05026 , H01L2224/05124 , H01L2224/05144 , H01L2224/05147 , H01L2224/05155 , H01L2224/05166 , H01L2224/05171 , H01L2224/05548 , H01L2224/11 , H01L2224/1147 , H01L2224/11472 , H01L2224/13 , H01L2224/13099 , H01L2224/18 , H01L2224/45124 , H01L2224/45144 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01012 , H01L2924/01013 , H01L2924/01015 , H01L2924/01022 , H01L2924/01024 , H01L2924/01029 , H01L2924/0103 , H01L2924/01033 , H01L2924/0104 , H01L2924/01046 , H01L2924/01047 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01327 , H01L2924/014 , H01L2924/10253 , H01L2924/14 , H01L2924/181 , H01L2924/3025 , H01L2924/351 , H01L2924/3511 , H01L2924/3512 , H01L2924/00 , H01L2224/48 , H01L2224/05599
摘要： A method of making a semiconductor chip assembly includes providing a semiconductor chip, a metal base, an insulative base and a conductive trace, wherein the chip includes a conductive pad, the metal base is disposed on a side of the insulative base that faces away from the chip, the conductive trace includes a contact terminal that extends through the insulative base, and the pad is exposed through an opening that extends through the metal base and the insulative base and is spaced from the contact terminal, then forming a connection joint that contacts and electrically connects the conductive trace and the pad, and then removing a portion of the metal base that contacts the contact terminal. Preferably, the opening extends through an insulative adhesive that attaches the chip to the conductive trace.
摘要翻译： 制造半导体芯片组件的方法包括提供半导体芯片，金属基底，绝缘基底和导电迹线，其中芯片包括导电垫，金属基底设置在绝缘基底的远离 芯片，导电迹线包括延伸穿过绝缘基底的接触端子，并且焊盘通过延伸穿过金属基底和绝缘基底的开口暴露，并且与接触端子间隔开，然后形成接触的连接接头 并且电连接导电迹线和焊盘，然后去除与接触端子接触的金属基底的一部分。 优选地，开口延伸穿过将芯片附接到导电迹线的绝缘粘合剂。
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3.发明授权Method of making a semiconductor chip assembly with a laterally aligned bumped terminal and filler 失效制造具有横向对准的凸起端子和填料的半导体芯片组件的方法公开(公告)号：US07459385B1
公开(公告)日：2008-12-02
申请号：US11604608
申请日：2006-11-27
CPC分类号： H01L23/3128 , H01L21/4832 , H01L21/486 , H01L21/6835 , H01L23/49827 , H01L24/24 , H01L24/45 , H01L24/48 , H01L24/73 , H01L24/82 , H01L2224/04105 , H01L2224/05001 , H01L2224/05008 , H01L2224/05022 , H01L2224/05124 , H01L2224/05147 , H01L2224/05155 , H01L2224/05548 , H01L2224/05569 , H01L2224/056 , H01L2224/13008 , H01L2224/16 , H01L2224/32145 , H01L2224/32225 , H01L2224/45124 , H01L2224/45144 , H01L2224/48091 , H01L2224/48227 , H01L2224/48465 , H01L2224/73204 , H01L2224/73265 , H01L2224/92247 , H01L2924/01005 , H01L2924/01006 , H01L2924/01012 , H01L2924/01013 , H01L2924/01019 , H01L2924/01024 , H01L2924/01029 , H01L2924/0103 , H01L2924/01033 , H01L2924/0104 , H01L2924/01046 , H01L2924/01047 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01327 , H01L2924/014 , H01L2924/09701 , H01L2924/14 , H01L2924/15311 , H01L2924/181 , H01L2924/19041 , H01L2924/3025 , H01L2924/351 , H01L2924/3512 , H01L2924/00014 , H01L2924/00 , H01L2924/00012 , H01L2924/00015 , H01L2224/32245 , H01L2224/48247
摘要： A method of making a semiconductor chip assembly includes providing a metal base, a routing line, a bumped terminal and a filler, wherein the routing line is adjacent to the bumped terminal, then mechanically attaching a semiconductor chip to the metal base, the routing line, the bumped terminal and the filler, then forming an encapsulant, then etching the metal base to expose the bumped terminal, and then grinding the bumped terminal to expose the filler.
摘要翻译： 制造半导体芯片组件的方法包括提供金属基底，布线线，凸起端子和填料，其中布线线与凸起端子相邻，然后机械地将半导体芯片附接到金属基底，布线线 ，凸起端子和填料，然后形成密封剂，然后蚀刻金属基底以暴露凸起的端子，然后研磨凸起的端子以暴露填料。
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4.发明授权Method of making a semiconductor chip assembly with a carved bumped terminal 失效制造具有雕刻凸起端子的半导体芯片组件的方法公开(公告)号：US07071089B1
公开(公告)日：2006-07-04
申请号：US10998338
申请日：2004-11-27
IPC分类号： H01L21/44
CPC分类号： H01L24/83 , H01L21/4832 , H01L21/565 , H01L21/568 , H01L21/6835 , H01L23/3128 , H01L24/11 , H01L24/16 , H01L24/24 , H01L24/29 , H01L24/32 , H01L24/45 , H01L24/48 , H01L24/82 , H01L24/85 , H01L24/90 , H01L2221/68345 , H01L2224/04105 , H01L2224/05124 , H01L2224/05155 , H01L2224/05556 , H01L2224/0557 , H01L2224/05571 , H01L2224/05573 , H01L2224/0558 , H01L2224/05647 , H01L2224/1134 , H01L2224/13099 , H01L2224/16 , H01L2224/29101 , H01L2224/29111 , H01L2224/2919 , H01L2224/32057 , H01L2224/32145 , H01L2224/32225 , H01L2224/45015 , H01L2224/45111 , H01L2224/45124 , H01L2224/45144 , H01L2224/45147 , H01L2224/45155 , H01L2224/45164 , H01L2224/4809 , H01L2224/48091 , H01L2224/48465 , H01L2224/48599 , H01L2224/73204 , H01L2224/73265 , H01L2224/83121 , H01L2224/83192 , H01L2224/83385 , H01L2224/83856 , H01L2224/85001 , H01L2224/85203 , H01L2224/85205 , H01L2224/85207 , H01L2225/0651 , H01L2225/06575 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01011 , H01L2924/01012 , H01L2924/01013 , H01L2924/01014 , H01L2924/01015 , H01L2924/01019 , H01L2924/01022 , H01L2924/01024 , H01L2924/01027 , H01L2924/01028 , H01L2924/01029 , H01L2924/0103 , H01L2924/01033 , H01L2924/0104 , H01L2924/01046 , H01L2924/01047 , H01L2924/0105 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/0132 , H01L2924/01327 , H01L2924/0134 , H01L2924/014 , H01L2924/0665 , H01L2924/07802 , H01L2924/09701 , H01L2924/14 , H01L2924/15311 , H01L2924/1579 , H01L2924/181 , H01L2924/19041 , H01L2924/19043 , H01L2924/20752 , H01L2924/3025 , H01L2924/351 , H01L2924/3512 , H01L2924/3651 , H01L2224/78 , H01L2924/00 , H01L2924/01026 , H01L2924/00015 , H01L2924/00012
摘要： A method of making a semiconductor chip assembly includes providing a metal base, a routing line, a bumped terminal and a metal filler, then mechanically attaching a semiconductor chip to the metal base, the routing line, the bumped terminal and the metal filler, then forming an encapsulant, then etching the metal base to expose the bumped terminal, and then grinding the bumped terminal to expose the metal filler.
摘要翻译： 制造半导体芯片组件的方法包括提供金属基底，布线线，凸起端子和金属填料，然后将半导体芯片机械地附接到金属基底，布线线，凸起端子和金属填料，然后 形成密封剂，然后蚀刻金属基底以暴露凸起的端子，然后研磨凸起端子以暴露金属填料。
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5.发明授权Three-dimensional stacked semiconductor package with metal pillar in encapsulant aperture 失效三维堆叠半导体封装与密封剂孔中的金属支柱公开(公告)号：US07067911B1
公开(公告)日：2006-06-27
申请号：US10966816
申请日：2004-10-15
IPC分类号： H01L23/02
CPC分类号： H01L23/3128 , H01L21/4832 , H01L21/4853 , H01L23/49811 , H01L23/49816 , H01L23/5384 , H01L23/5389 , H01L24/24 , H01L24/45 , H01L24/48 , H01L24/73 , H01L24/82 , H01L25/105 , H01L2224/04105 , H01L2224/05001 , H01L2224/05008 , H01L2224/05026 , H01L2224/05124 , H01L2224/05147 , H01L2224/05155 , H01L2224/05166 , H01L2224/05171 , H01L2224/05548 , H01L2224/05552 , H01L2224/05554 , H01L2224/05569 , H01L2224/05573 , H01L2224/05644 , H01L2224/16237 , H01L2224/26175 , H01L2224/32145 , H01L2224/32225 , H01L2224/45015 , H01L2224/45124 , H01L2224/45144 , H01L2224/48091 , H01L2224/48465 , H01L2224/48511 , H01L2224/73204 , H01L2224/73265 , H01L2225/1023 , H01L2225/1035 , H01L2225/1058 , H01L2924/00011 , H01L2924/01005 , H01L2924/01006 , H01L2924/01012 , H01L2924/01013 , H01L2924/01015 , H01L2924/01019 , H01L2924/01024 , H01L2924/01029 , H01L2924/0103 , H01L2924/01033 , H01L2924/0104 , H01L2924/01046 , H01L2924/01047 , H01L2924/01049 , H01L2924/01074 , H01L2924/01077 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01087 , H01L2924/01327 , H01L2924/09701 , H01L2924/10253 , H01L2924/14 , H01L2924/15311 , H01L2924/15331 , H01L2924/181 , H01L2924/19041 , H01L2924/3025 , H01L2924/351 , H01L2924/3512 , H01L2924/00014 , H01L2224/48227 , H01L2924/00012 , H01L2924/00 , H01L2924/00015 , H01L2924/01004
摘要： A three-dimensional stacked semiconductor package includes first and second semiconductor chip assemblies. The first semiconductor chip assembly includes a first chip, a first conductive trace and a first encapsulant, and the first conductive trace includes a first metal pillar. The second semiconductor chip assembly includes a second chip, a second conductive trace and a second encapsulant, and the second encapsulant includes a second aperture. The first metal pillar extends into the second aperture.
摘要翻译： 三维堆叠半导体封装包括第一和第二半导体芯片组件。 第一半导体芯片组件包括第一芯片，第一导电迹线和第一密封剂，并且第一导电迹线包括第一金属支柱。 第二半导体芯片组件包括第二芯片，第二导电迹线和第二密封剂，并且第二密封剂包括第二孔。 第一金属柱延伸到第二孔中。
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6.发明授权Method of connecting a bumped compliant conductive trace to a semiconductor chip 失效将碰撞的柔性导电迹线连接到半导体芯片的方法公开(公告)号：US06537851B1
公开(公告)日：2003-03-25
申请号：US09917339
申请日：2001-07-27
IPC分类号： H01L2144
CPC分类号： H01L24/11 , H01L2224/05548 , H01L2224/05569 , H01L2224/05571 , H01L2224/05573 , H01L2224/1134 , H01L2224/45124 , H01L2224/45144 , H01L2224/78301 , H01L2924/00013 , H01L2924/00014 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01011 , H01L2924/01012 , H01L2924/01013 , H01L2924/01015 , H01L2924/01019 , H01L2924/01022 , H01L2924/01024 , H01L2924/01029 , H01L2924/0103 , H01L2924/01033 , H01L2924/0104 , H01L2924/01046 , H01L2924/01047 , H01L2924/01074 , H01L2924/01077 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01327 , H01L2924/014 , H01L2924/07802 , H01L2924/09701 , H01L2924/14 , H01L2924/181 , H01L2924/3025 , H05K3/4046 , H01L2224/13099 , H01L2924/00 , H01L2224/48
摘要： A method of connecting a conductive trace to a semiconductor chip includes providing a semiconductor chip, a conductive trace and a base, wherein the chip includes a conductive pad, the conductive trace includes a bumped terminal, the base includes a recess, the conductive trace is disposed proximate to the pad, the base contacts and covers the conductive trace on a side opposite the chip, the bumped terminal is in the recess, and the conductive trace and the base are different metals, etching the base to expose the conductive trace, and forming a connection joint that contacts and electrically connects the conductive trace and the pad. Preferably, the bumped terminal is outside a periphery of the chip, and an encapsulant provides compressible mechanical support for the bumped terminal.
摘要翻译： 将导电迹线连接到半导体芯片的方法包括提供半导体芯片，导电迹线和基极，其中所述芯片包括导电焊盘，所述导电迹线包括凸起端子，所述基底包括凹部，所述导电迹线是 靠近焊盘设置，基座在与芯片相对的一侧接触并覆盖导电迹线，凸起的端子在凹槽中，导电迹线和基座是不同的金属，蚀刻基底以暴露导电迹线，以及 形成接触和电连接导电迹线和焊盘的连接接头。 优选地，凸起端子在芯片的外围之外，并且密封剂为凸起端子提供可压缩的机械支撑。
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7.发明授权公开(公告)号：US07262082B1
公开(公告)日：2007-08-28
申请号：US11498614
申请日：2006-08-03
IPC分类号： H01L21/44
CPC分类号： H01L25/105 , H01L21/568 , H01L21/6835 , H01L23/3128 , H01L23/49517 , H01L24/16 , H01L24/24 , H01L24/29 , H01L24/45 , H01L24/48 , H01L24/73 , H01L24/82 , H01L25/0657 , H01L2221/68345 , H01L2224/05001 , H01L2224/05026 , H01L2224/05548 , H01L2224/05571 , H01L2224/05573 , H01L2224/13099 , H01L2224/16 , H01L2224/18 , H01L2224/32145 , H01L2224/32225 , H01L2224/45144 , H01L2224/45147 , H01L2224/48091 , H01L2224/48227 , H01L2224/4824 , H01L2224/48465 , H01L2224/48599 , H01L2224/73204 , H01L2224/73215 , H01L2224/73217 , H01L2224/73265 , H01L2224/76155 , H01L2224/82102 , H01L2224/85207 , H01L2224/92144 , H01L2225/0651 , H01L2225/06541 , H01L2225/06586 , H01L2225/1023 , H01L2225/1035 , H01L2225/1058 , H01L2225/1094 , H01L2924/01005 , H01L2924/01006 , H01L2924/01011 , H01L2924/01012 , H01L2924/01013 , H01L2924/01014 , H01L2924/01015 , H01L2924/01019 , H01L2924/01022 , H01L2924/01024 , H01L2924/01027 , H01L2924/01028 , H01L2924/01029 , H01L2924/0103 , H01L2924/01033 , H01L2924/0104 , H01L2924/01046 , H01L2924/01047 , H01L2924/0105 , H01L2924/01074 , H01L2924/01077 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01083 , H01L2924/01327 , H01L2924/014 , H01L2924/078 , H01L2924/09701 , H01L2924/10253 , H01L2924/14 , H01L2924/15311 , H01L2924/15331 , H01L2924/181 , H01L2924/1815 , H01L2924/18162 , H01L2924/19041 , H01L2924/19043 , H01L2924/3025 , H01L2924/3512 , H01L2924/00014 , H01L2924/00 , H01L2924/00012 , H01L2924/00011
摘要： A method of making a three-dimensional stacked semiconductor package includes providing a first semiconductor chip assembly that includes a first chip, a first conductive trace and a first encapsulant, wherein the first conductive trace includes a first metal pillar, providing a second semiconductor chip assembly that includes a second chip, a second conductive trace and a second encapsulant, wherein the second encapsulant includes a second aperture, and then positioning the first and second assemblies such that the first assembly overlaps the second assembly and the first metal pillar extends into the second aperture.
摘要翻译： 制造三维堆叠半导体封装的方法包括提供包括第一芯片，第一导电迹线和第一密封剂的第一半导体芯片组件，其中第一导电迹线包括第一金属柱，提供第二半导体芯片组件 其包括第二芯片，第二导电迹线和第二密封剂，其中所述第二密封剂包括第二孔，然后定位所述第一和第二组件，使得所述第一组件与所述第二组件重叠，并且所述第一金属柱延伸到所述第二组件中 光圈。
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公开(公告)号：US07129575B1
公开(公告)日：2006-10-31
申请号：US10994604
申请日：2004-11-22
IPC分类号： H01L23/48 , H01L23/495 , H01L23/12
CPC分类号： H01L23/49827 , H01L21/4832 , H01L21/4846 , H01L21/6835 , H01L23/3107 , H01L24/29 , H01L24/32 , H01L24/45 , H01L24/48 , H01L24/73 , H01L24/81 , H01L24/83 , H01L24/85 , H01L2221/68377 , H01L2224/0401 , H01L2224/05554 , H01L2224/05624 , H01L2224/05655 , H01L2224/16 , H01L2224/29101 , H01L2224/29111 , H01L2224/2919 , H01L2224/32057 , H01L2224/32145 , H01L2224/32225 , H01L2224/45111 , H01L2224/45124 , H01L2224/45144 , H01L2224/45147 , H01L2224/45155 , H01L2224/45164 , H01L2224/48091 , H01L2224/48227 , H01L2224/48465 , H01L2224/48599 , H01L2224/73204 , H01L2224/73265 , H01L2224/8121 , H01L2224/81815 , H01L2224/83121 , H01L2224/83192 , H01L2224/83194 , H01L2224/83385 , H01L2224/83856 , H01L2224/85 , H01L2224/85207 , H01L2924/01005 , H01L2924/01006 , H01L2924/01011 , H01L2924/01012 , H01L2924/01013 , H01L2924/01014 , H01L2924/01015 , H01L2924/01019 , H01L2924/01022 , H01L2924/01024 , H01L2924/01028 , H01L2924/01029 , H01L2924/0103 , H01L2924/01033 , H01L2924/0104 , H01L2924/01046 , H01L2924/01047 , H01L2924/0105 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01202 , H01L2924/01203 , H01L2924/0132 , H01L2924/01327 , H01L2924/0134 , H01L2924/014 , H01L2924/0665 , H01L2924/07802 , H01L2924/09701 , H01L2924/14 , H01L2924/15311 , H01L2924/1579 , H01L2924/181 , H01L2924/19041 , H01L2924/19043 , H01L2924/3025 , H01L2924/351 , H01L2924/3651 , H01L2924/00014 , H01L2924/00 , H01L2924/01026 , H01L2924/3512 , H01L2924/00015 , H01L2224/13111 , H01L2924/00012
摘要： A semiconductor chip assembly includes a semiconductor chip that includes a conductive pad, a conductive trace that includes a routing line, a bumped terminal and a metal pillar, a connection joint that electrically connects the routing line and the pad, and an encapsulant. The routing line is contiguous with the bumped terminal and extends laterally beyond the bumped terminal and the metal pillar, and the metal pillar contacts and extends vertically beyond the bumped terminal.
摘要翻译： 半导体芯片组件包括包括导电焊盘，包括布线线，凸起端子和金属柱的导电迹线的半导体芯片，电连接布线线和焊盘的连接接头以及密封剂。 路由线与凸起端子相邻并且横向延伸超过凸起端子和金属柱，并且金属柱接触并垂直延伸超过凸起端子。
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公开(公告)号：US06846735B1
公开(公告)日：2005-01-25
申请号：US10235270
申请日：2002-09-05
CPC分类号： G01R1/0466 , G01R1/0483 , G01R3/00 , H01L2924/0002 , H01L2924/00
摘要： A test probe includes a conductive trace with a bumped terminal, the bumped terminal includes a jagged contact surface and a cavity that face in opposite directions, and the contact surface includes a plated metal. The contact surface is jagged due to particles which may protrude, be covered or dislodged. Preferably, the test probe includes an elastomer that fills the cavity so that the bumped terminal is compliant. The test probe is well-suited for pressure contact with semiconductor chips, BGA packages and other electronic devices.
摘要翻译： 测试探针包括具有凸起端子的导电迹线，凸起端子包括锯齿状接触表面和面向相反方向的空腔，并且接触表面包括电镀金属。 由于可能突出，被覆盖或脱落的颗粒，接触表面是锯齿状的。 优选地，测试探针包括填充空腔的弹性体，使得凸起的端子是顺从的。 测试探头非常适合与半导体芯片，BGA封装和其他电子设备的压力接触。
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10.发明授权Method of making a bumped terminal in a laminated structure for a semiconductor chip assembly 失效在半导体芯片组件的叠层结构中制造凸起端子的方法公开(公告)号：US06800506B1
公开(公告)日：2004-10-05
申请号：US10156469
申请日：2002-05-28
IPC分类号： H01L2144
CPC分类号： H01L23/5389 , H01L2224/04105 , H01L2224/11 , H01L2224/1134 , H01L2224/11474 , H01L2224/12 , H01L2224/12105 , H01L2224/13099 , H01L2224/19 , H01L2224/32225 , H01L2224/45124 , H01L2224/45144 , H01L2224/82039 , H01L2224/82047 , H01L2224/92144 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01012 , H01L2924/01013 , H01L2924/01015 , H01L2924/01019 , H01L2924/01022 , H01L2924/01024 , H01L2924/01029 , H01L2924/0103 , H01L2924/01033 , H01L2924/0104 , H01L2924/01046 , H01L2924/01047 , H01L2924/01052 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01327 , H01L2924/014 , H01L2924/09701 , H01L2924/10253 , H01L2924/14 , H01L2924/181 , H01L2924/3025 , H01L2924/351 , H01L2924/3511 , H01L2924/3512 , H05K3/4046 , H01L2924/00 , H01L2224/48 , H01L2924/00012
摘要： A method of making a semiconductor chip assembly includes providing a semiconductor chip and a laminated structure, wherein the chip includes a conductive pad, the laminated structure includes a conductive trace, an insulative base and a metal base, the conductive trace includes a routing line and a bumped terminal, the metal base and the routing line are disposed on opposite sides of the insulative base, and the bumped terminal includes a cavity that extends through the insulative base and into the metal base, removing a portion of the metal base that contacts the bumped terminal, and forming a connection joint that contacts and electrically connects the conductive trace and the pad.
摘要翻译： 制造半导体芯片组件的方法包括提供半导体芯片和层叠结构，其中所述芯片包括导电焊盘，所述层叠结构包括导电迹线，绝缘基底和金属基底，所述导电迹线包括布线线和 凸起端子，金属基座和布线线设置在绝缘基座的相对侧上，凸起端子包括延伸穿过绝缘基座并进入金属基座的空腔，去除与金属基座接触的部分 并且形成接触和电连接导电迹线和焊盘的连接接头。
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