- 专利标题: Method of fabricating semiconductor device
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申请号: US10785103申请日: 2004-02-25
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公开(公告)号: US06803281B2公开(公告)日: 2004-10-12
- 发明人: Sumito Numazawa , Yoshito Nakazawa , Masayoshi Kobayashi , Satoshi Kudo , Yasuo Imai , Sakae Kubo , Takashi Shigematsu , Akihiro Ohnishi , Kozo Uesawa , Kentaro Oishi
- 申请人: Sumito Numazawa , Yoshito Nakazawa , Masayoshi Kobayashi , Satoshi Kudo , Yasuo Imai , Sakae Kubo , Takashi Shigematsu , Akihiro Ohnishi , Kozo Uesawa , Kentaro Oishi
- 优先权: JP9-232425 19970828
- 主分类号: H01L21336
- IPC分类号: H01L21336
摘要:
In a method of fabricating a semiconductor device having a MISFET of trench gate structure, a trench is formed from a major surface of a semiconductor layer of first conductivity type which serves as a drain region, in a depth direction of the semiconductor layer, a gate insulating film including a thermal oxide film and a deposited film is formed over the internal surface of the trench, and after a gate electrode has been formed in the trench, impurities are introduced into the semiconductor substrate of first conductivity type to form a semiconductor region of second conductivity type which serves as a channel forming region, and impurities are introduced into the semiconductor region of second conductivity type to form the semiconductor region of first conductivity type which serves as a source region.
公开/授权文献
- US20040166656A1 METHOD OF FABRICATING SEMICONDUCTOR DEVICE 公开/授权日:2004-08-26
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