发明授权
- 专利标题： Semiconductor integrated circuit device and process for manufacturing the same including spacers on bit lines
- 专利标题（中）： 半导体集成电路器件及其制造方法，包括位线上的间隔物
-
申请号： US09416959申请日： 1999-10-13
-
公开(公告)号： US06815762B2公开(公告)日： 2004-11-09
- 发明人: Makoto Yoshida , Takahiro Kumauchi , Yoshitaka Tadaki , Kazuhiko Kajigaya , Hideo Aoki , Isamu Asano
- 申请人： Makoto Yoshida , Takahiro Kumauchi , Yoshitaka Tadaki , Kazuhiko Kajigaya , Hideo Aoki , Isamu Asano
- 主分类号： H01L29788
- IPC分类号： H01L29788
摘要：
In a process for manufacturing a semiconductor integrated circuit device having a MISFET, in order that a shallow junction between the source/drain of the MISFET and a semiconductor substrate may be realized by reducing the number of heat treatment steps, all conductive films to be deposited on the semiconductor substrate are deposited at a temperature of 500° C. or lower at a step after the MISFET has been formed. Moreover, all insulating films to be deposited over the semiconductor substrate are deposited at a temperature of 500° C. or lower at a step after the MISFET has been formed.
公开/授权文献
信息查询
