LDMOS and CMOS integrated circuit and method of making

发明授权

US06818494B1 LDMOS and CMOS integrated circuit and method of making 失效

标题翻译： LDMOS和CMOS集成电路及其制作方法

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专利标题： LDMOS and CMOS integrated circuit and method of making
专利标题（中）： LDMOS和CMOS集成电路及其制作方法
申请号： US09817703

申请日： 2001-03-26
公开(公告)号： US06818494B1

公开(公告)日： 2004-11-16
发明人: Zhizang Chen , Bao-Sung Bruce Yeh , S. Jonathan Wang , Cathy P. Peltier
申请人： Zhizang Chen , Bao-Sung Bruce Yeh , S. Jonathan Wang , Cathy P. Peltier
主分类号： H01L218238
IPC分类号： H01L218238

LDMOS and CMOS integrated circuit and method of making

摘要：

An integrated circuit (IC) is formed on a substrate. The IC has a first well having a first dopant concentration that includes a second conductivity low-voltage transistor. The IC also has a second well having a dopant concentration equal to the first dopant concentration that includes a first conductivity high-voltage transistor. In addition, the IC has a third well having a second dopant concentration of an opposite type than the first well that includes a first conductivity low-voltage transistor. The first conductivity low-voltage transistor and the second conductivity low-voltage transistor are created without a threshold voltage (Vt) implant.

摘要（中）：

在基板上形成集成电路（IC）。 IC具有第一阱，其具有包括第二导电低压晶体管的第一掺杂剂浓度。 IC还具有掺杂浓度等于包括第一导电高压晶体管的第一掺杂剂浓度的第二阱。此外，IC具有第三阱，其具有与包括第一导电低压晶体管的第一阱相反类型的第二掺杂剂浓度。产生第一导电低压晶体管和第二导电低压晶体管，而没有阈值电压（Vt）植入。

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