发明授权
US06830996B2 Device performance improvement by heavily doped pre-gate and post polysilicon gate clean
有权
通过重掺杂的预栅极和后多晶硅栅极清洁器件性能改进
- 专利标题: Device performance improvement by heavily doped pre-gate and post polysilicon gate clean
- 专利标题(中): 通过重掺杂的预栅极和后多晶硅栅极清洁器件性能改进
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申请号: US10395345申请日: 2003-03-24
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公开(公告)号: US06830996B2公开(公告)日: 2004-12-14
- 发明人: Chia-Lin Chen , Tze Liang Lee , Shih-Chang Chen
- 申请人: Chia-Lin Chen , Tze Liang Lee , Shih-Chang Chen
- 主分类号: H01L213205
- IPC分类号: H01L213205
摘要:
The present disclosure provides a method is provided for fabricating a metal oxide semiconductor (MOS) gate stack on a semiconductor substrate. The method includes generating moisture on a surface of the semiconductor substrate to form an oxide layer less than 10 nanometers thin and performing a nitridation process on the thin oxide layer. After the nitridation process, the method includes performing a polysilicon deposition process on the surface of the semiconductor substrate, doping the polysilicon deposition to a level of 5×1015 at/cm3, and cleaning the doped polysilicon with a light ammonia solution.
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