发明授权
US06848028B1 Microprocessor having a page prefetch cache for database applications 有权
微处理器具有用于数据库应用程序的页预取缓存

Microprocessor having a page prefetch cache for database applications
摘要:
A microprocessor cache configuration for reducing database cache misses and improving the processing speed, comprising a level-1 data cache, and a page prefetch cache. The page prefetch cache is adjacent the level-1 data cache. The page prefetch cache is configured to receive and store one or more database pages. Additionally, a page prefetch instruction provides the database pages to the page prefetch cache. The page prefetch instructions are generated by a compiler or by developer software.
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