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US06849567B2 Low temperature sinterable dielectric ceramic composition and multilayer ceramic chip capacitor using the same 失效
低温可烧结介电陶瓷组合物和使用其的多层陶瓷片式电容器

Low temperature sinterable dielectric ceramic composition and multilayer ceramic chip capacitor using the same
摘要：
A low temperature sinterable dielectric ceramic composition and a multilayer ceramic chip capacitor. The dielectric ceramic composition is expressed by the general formula: aBaTiO3-bMgCO3-cY2O3-dCr2O3-eV2O5-f(xZrO2-y(K,Li)2O-zSiO2) (x+y+z=1; 0.05≦x≦0.18, 0.01≦y≦0.08, and 0.7.4≦z≦0.93); in which a, b, c, d, e and f are molar ratios; a=100, 1.0≦b≦2.0, 0.2≦c≦2.0, 0.02≦d≦0.3, 0.02≦e≦0.3, and 0.5≦f
摘要（中）：

低温可烧结介电陶瓷组合物和多层陶瓷片式电容器。 介电陶瓷组合物由以下通式表示：aBaTiO3-bMgCO3-cY2O3-dCr2O3-eV2O5-f（xZrO2-y（K，Li）2O-zSiO2）（x + y + z = 1; 0.05 <= x < 0.18,0.01 <= y <= 0.08和0.7.4 <= z <= 0.93）; 其中a，b，c，d，e和f是摩尔比; a = 100,1.0 <= b <= 2.0,0.2 <= c <= 2.0,0.02 <= d <= 0.3,0.02 <= e <= 0.3和0.5 <= f <2。 使用介电陶瓷组合物制备多层陶瓷片状电容器。 根据本发明的电介质组合物可以在低温下烧结而不降低介电常数，从而可以制造超薄层电介质。

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