Invention Grant
- Patent Title: Method for the fabrication of a DMOS transistor
- Patent Title (中): 制造DMOS晶体管的方法
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Application No.: US10424019Application Date: 2003-04-25
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Publication No.: US06852598B2Publication Date: 2005-02-08
- Inventor: Karlheinz Müller , Klaus Röschlau , Cajetan Wagner
- Applicant: Karlheinz Müller , Klaus Röschlau , Cajetan Wagner
- Applicant Address: DE Munich
- Assignee: Infineon Technologies AG
- Current Assignee: Infineon Technologies AG
- Current Assignee Address: DE Munich
- Agent Laurence A. Greenberg; Werner H. Stemer; Gregory L. Mayback
- Main IPC: H01L29/78
- IPC: H01L29/78 ; H01L21/336 ; H01L29/423

Abstract:
A method for the fabrication of a DMOS transistor structure provides the advantage that, through the use of a protective layer, the DMOS transistor structure, which has already been substantially completed, is protected from the adverse effects of further process steps. The DMOS gate electrode is not, as is customary in the prior art, patterned using a single lithography step, but, rather, the patterning of the DMOS gate electrode is split between two lithography steps. In a first lithography step, substantially only the source region of the DMOS transistor structure is opened. Therefore, the electrode layer that is still present can be used as a mask for the subsequent fabrication of the body region.
Public/Granted literature
- US20030190778A1 Method for the fabrication of a DMOS transistor Public/Granted day:2003-10-09
Information query
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