- 专利标题: Stacked local interconnect structure and method of fabricating same
-
申请号: US10407957申请日: 2003-04-04
-
公开(公告)号: US06858525B2公开(公告)日: 2005-02-22
- 发明人: Jigish D. Trivedi
- 申请人: Jigish D. Trivedi
- 申请人地址: US ID Boise
- 专利权人: Micron Technology, Inc.
- 当前专利权人: Micron Technology, Inc.
- 当前专利权人地址: US ID Boise
- 代理机构: TraskBritt
- 主分类号: H01L21/768
- IPC分类号: H01L21/768 ; H01L23/535 ; H01L21/476
摘要:
A method is provided for forming stacked local interconnects that do not extend into higher levels within a multilevel IC device, thereby economizing space available within the IC device and increasing design flexibility. In a first embodiment, the method of the present invention provides a stacked local interconnect which electrically connects a first group of interconnected electrical features with one or more additional isolated groups of interconnected electrical features or one or more isolated individual electrical features. In a second embodiment, the method of the present invention provides a stacked local interconnect which electrically connects an individual electrical feature to one or more additional isolated electrical features.
公开/授权文献
信息查询
IPC分类: