发明授权
- 专利标题： Three-state binary adders and methods of operating the same
- 专利标题（中）： 三态二进制加法器和操作方法相同
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申请号： US09569954申请日： 2000-05-12
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公开(公告)号： US06859387B1公开(公告)日： 2005-02-22
- 发明人: Arlo J. Aude , Laurence D. Lewicki
- 申请人： Arlo J. Aude , Laurence D. Lewicki
- 申请人地址： US CA Santa Clara
- 专利权人： National Semiconductor Corporation
- 当前专利权人： National Semiconductor Corporation
- 当前专利权人地址： US CA Santa Clara
- 主分类号： G06F7/48
- IPC分类号： G06F7/48 ; H03M1/06 ; H03M1/12 ; H03M1/38 ; H03M1/44
摘要：
Three-state binary adders are disclosed for use in pipelined analog-to-digital converters. According to one advantageous embodiment, a three-state binary adder is provided for use in a digital signal processing system. The three-state binary adder is operable to generate binary codes consisting of three states, namely, “00”, “01” and “10.”
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