Invention Grant
US06864516B2 SOI MOSFET junction degradation using multiple buried amorphous layers
有权
使用多个埋入非晶层的SOI MOSFET结退化
- Patent Title: SOI MOSFET junction degradation using multiple buried amorphous layers
- Patent Title (中): 使用多个埋入非晶层的SOI MOSFET结退化
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Application No.: US10085903Application Date: 2002-02-28
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Publication No.: US06864516B2Publication Date: 2005-03-08
- Inventor: Andy Wei , Akif Sultan , David Wu
- Applicant: Andy Wei , Akif Sultan , David Wu
- Applicant Address: US CA Sunnyvale
- Assignee: Advanced Micro Devices, Inc.
- Current Assignee: Advanced Micro Devices, Inc.
- Current Assignee Address: US CA Sunnyvale
- Agent Timothy M. Honeycut
- Main IPC: H01L21/265
- IPC: H01L21/265 ; H01L21/322 ; H01L21/336 ; H01L29/786 ; H01L29/74
Abstract:
Various circuit devices incorporating junction-traversing dislocation regions and methods of making the same are provided. In one aspect, a method of processing is provided that includes forming an impurity region in a device region of a semiconductor-on-insulator substrate. The impurity region defines a junction. A dislocation region is formed in the device region that traverses the junction. The dislocation region provides a pathway to neutralize charge lingering in a floating body of a device.
Public/Granted literature
- US20030162336A1 SOI mosfet junction degradation using multiple buried amorphous layers Public/Granted day:2003-08-28
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