发明授权
US06870273B2 High speed I/O pad and pad/cell interconnection for flip chips
有权
用于倒装芯片的高速I / O焊盘和焊盘/单元互连
- 专利标题： High speed I/O pad and pad/cell interconnection for flip chips
- 专利标题（中）： 用于倒装芯片的高速I / O焊盘和焊盘/单元互连
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申请号： US10424817申请日： 2003-04-29
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公开(公告)号： US06870273B2公开(公告)日： 2005-03-22
- 发明人: Yuming Tao , Vernon R. Little
- 申请人： Yuming Tao , Vernon R. Little
- 申请人地址： CA
- 专利权人： PMC-Sierra, Inc.
- 当前专利权人： PMC-Sierra, Inc.
- 当前专利权人地址： CA
- 代理商 Clifford W. Vermette
- 主分类号： H01L21/60
- IPC分类号： H01L21/60 ; H01L23/50 ; H01L23/528 ; H01L23/552 ; H01L23/48
摘要：
Gridded I/O pads for flip-chip packages in which a coaxial-like solder bump pad configuration is used in which the I/O pads closest to the signal or bump pad are power or ground pads. The ground pads surrounding the signal pad form a coaxial-like pad configuration for impedance matching at the transition from die to package substrate. The ground pads surrounding the signal pad may be connected by a metal trace to form a ground pad ring. The invention employs conductor-backed ground coplanar waveguides (GCPW), which match impedance at connections between I/O cells and signal pads to enhance signal transmission, avoid reflection and leakage, and provide superior electromagnetic shielding. The present invention also supports high quantities of I/Os for a given die size, and supports flexible power and ground placement.
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