Invention Grant
- Patent Title: Signal-conditioning and analog-to-digital conversion circuit architecture
- Patent Title (中): 信号调理和模数转换电路架构
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Application No.: US10785831Application Date: 2004-02-24
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Publication No.: US06879274B2Publication Date: 2005-04-12
- Inventor: Eric Nestler , Paul Daigle , Michael A. Ashburn, Jr.
- Applicant: Eric Nestler , Paul Daigle , Michael A. Ashburn, Jr.
- Applicant Address: US MA Norwood
- Assignee: Analog Devices, Inc.
- Current Assignee: Analog Devices, Inc.
- Current Assignee Address: US MA Norwood
- Agency: Gauthier & Connors LLP
- Main IPC: H03M1/06
- IPC: H03M1/06 ; H03M1/12

Abstract:
An analog-to-digital metering circuit includes a first programmable gain amplifier to amplify a first voltage signal from a first channel before being received by a first analog-to-digital converter that converts the amplified first voltage signal to a first digital signal. A second programmable gain amplifier amplifies a second voltage signal from a second channel and feds the amplified signal to a second analog-to-digital converter that converts the amplified second voltage signal to a second digital signal. A first lowpass filter circuit receives the first and second digital signals, to generate therefrom, a multi-bit analog-to-digital value. A direct digital synthesizer generates a digital signal representing a predetermined waveform that is fed to a digital-to-analog converter. The second voltage signal and the digital signal representing the predetermined waveform are multiplied together to generate a digital value. Phase shifting circuitry provides a signal representing a 90-degree phase shift of the digital value and a signal representing a 0-degree phase shift of the digital value. RMS circuitry converts the 0-degree phase digital signal into an In-Phase signal and the 90-degree phase digital signal into a Quadrature signal.
Public/Granted literature
- US20040252043A1 Signal-conditioning and analog-to-digital conversion circuit architecture Public/Granted day:2004-12-16
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