Invention Grant
US06901106B1 Delay lock code tracking loop employing multiple timing references
有权
延迟锁定码跟踪循环采用多个定时参考
- Patent Title: Delay lock code tracking loop employing multiple timing references
- Patent Title (中): 延迟锁定码跟踪循环采用多个定时参考
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Application No.: US09420846Application Date: 1999-10-19
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Publication No.: US06901106B1Publication Date: 2005-05-31
- Inventor: Yun-Yen Chen , Muh-Rong Yang
- Applicant: Yun-Yen Chen , Muh-Rong Yang
- Applicant Address: TW Hsinchu
- Assignee: Industrial Technology Research Institute
- Current Assignee: Industrial Technology Research Institute
- Current Assignee Address: TW Hsinchu
- Main IPC: H04B1/7085
- IPC: H04B1/7085 ; H04L7/02 ; H04L27/30

Abstract:
A code tracking system and method especially for use in direct sequence code division multiple access (DS-CDMA) communication systems employs multiple timing references within a chip by tracking the multiple timing references relative to the exact midpoint of the chip, then adjusting the timing references to the exact midpoint of the chip, and outputting an error tracking signal in accordance with the minimum error associated with the multiple timing references. The system performs effective code tracking with low lock-loss rate even when the noise of a receiving path interferes with detection of some of the timing references. The system uses multiple delay-locked loops for the different timing references.
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