SMART POWER ADAPTOR AND METHOD FOR CONTROLLING POWER SUPPLAY THEREOF
    1.
    发明申请
    SMART POWER ADAPTOR AND METHOD FOR CONTROLLING POWER SUPPLAY THEREOF 有权
    智能电源适配器及其控制电源的方法

    公开(公告)号:US20150263638A1

    公开(公告)日:2015-09-17

    申请号:US14291013

    申请日:2014-05-30

    申请人: Muh-Rong Yang

    发明人: Muh-Rong Yang

    IPC分类号: H02M7/04

    摘要: A smart power adaptor and a method of controlling power supply thereof are provided. The smart power adaptor includes a power conversion circuit and a control unit. The power conversion circuit is configured to convert an alternating current (AC) power into a direct current (DC) power for providing to a load device. The control unit is coupled to the power conversion circuit. The control unit is configured to apply a corresponding power-supply control mean according to a power state through communication of a charging communication protocol of a battery module of the load device to control an operation of the power conversion circuit, so that the power conversion circuit uses different power conversion behaviors to generate the DC power in response to changing of the power status.

    摘要翻译: 提供了一种智能电源适配器及其电源的控制方法。 智能电源适配器包括电源转换电路和控制单元。 功率转换电路被配置为将交流(AC)功率转换成直流(DC)功率以提供给负载装置。 控制单元耦合到电力转换电路。 控制单元被配置为通过通过负载设备的电池模块的充电通信协议的通信来根据功率状态施加相应的电源控制装置,以控制电力转换电路的操作,使得电力转换电路 使用不同的电力转换行为来响应电力状态的变化产生直流电力。

    Delay lock code tracking loop employing multiple timing references
    2.
    发明授权
    Delay lock code tracking loop employing multiple timing references 有权
    延迟锁定码跟踪循环采用多个定时参考

    公开(公告)号:US06901106B1

    公开(公告)日:2005-05-31

    申请号:US09420846

    申请日:1999-10-19

    IPC分类号: H04B1/7085 H04L7/02 H04L27/30

    CPC分类号: H04B1/7085

    摘要: A code tracking system and method especially for use in direct sequence code division multiple access (DS-CDMA) communication systems employs multiple timing references within a chip by tracking the multiple timing references relative to the exact midpoint of the chip, then adjusting the timing references to the exact midpoint of the chip, and outputting an error tracking signal in accordance with the minimum error associated with the multiple timing references. The system performs effective code tracking with low lock-loss rate even when the noise of a receiving path interferes with detection of some of the timing references. The system uses multiple delay-locked loops for the different timing references.

    摘要翻译: 特别用于直接序列码分多址(DS-CDMA)通信系统的码跟踪系统和方法通过相对于芯片的确切中点跟踪多个定时参考,在芯片内采用多个定时参考,然后调整定时参考 到芯片的确切中点,并且根据与多个定时参考相关联的最小误差输出误差跟踪信号。 即使当接收路径的噪声干扰一些定时参考的检测时,该系统以低锁定丢失率执行有效的代码跟踪。 系统对不同的定时参考使用多个延迟锁定环路。

    Scalable architecture for media-on demand servers
    3.
    发明授权
    Scalable architecture for media-on demand servers 有权
    适用于媒体点播服务器的可扩展架构

    公开(公告)号:US06279040B1

    公开(公告)日:2001-08-21

    申请号:US09300826

    申请日:1999-04-27

    IPC分类号: G06F1300

    摘要: A scalable server architecture for use in implementing scaled media servers capable of simultaneous real-time data stream retrieval for large numbers of subscribers. A scalable server includes a plurality of stream pumping engines each accessing a particular storage device of a storage subsystem, and a server processor which receives retrieval requests from subscribers and directs the stream pumping engines to retrieve the requested data streams. Each of the stream pumping engines may include a storage controller coupled to its corresponding storage device for directing retrieval of the requested stream therefrom, a network controller for supplying the retrieved stream to a client network, and a processor for directing the operation of the storage and network controllers. Each of the stream pumping engines may also include a shared memory accessible by the corresponding stream pumping engine processor and the server processor. The shared memory facilitates communication with other stream pumping engines via the server processor and server system bus. A scaled media server may be implemented by cross-connecting several scalable servers with a plurality of stream multiplexers. Each of the stream multiplexers can include a separate packet input unit for processing the packets of each media stream such that two distinct levels of transmission priority are provided and quality of server restrictions are satisfied for all streams.

    摘要翻译: 一种可扩展的服务器体系结构,用于实现能够为大量用户同时进行实时数据流检索的缩放媒体服务器。 可扩展服务器包括每个访问存储子系统的特定存储设备的多个流泵送引擎,以及服务器处理器,其接收来自订户的检索请求并指示流泵送引擎检索所请求的数据流。 每个流泵送引擎可以包括耦合到其相应的存储设备的存储控制器,用于指示从其中检索所请求的流,网络控制器,用于将检索到的流提供给客户端网络;以及处理器,用于指导存储器的操作,以及 网络控制器 每个流泵送引擎还可以包括由相应的流泵送引擎处理器和服务器处理器可访问的共享存储器。 共享内存便于通过服务器处理器和服务器系统总线与其他流泵送引擎进行通信。 可以通过将多个可扩展服务器与多个流多路复用器交叉连接来实现缩放的媒体服务器。 每个流多路复用器可以包括单独的分组输入单元,用于处理每个媒体流的分组,使得提供两个不同级别的传输优先级,并且对于所有流来满足服务器限制的质量。

    REFERENCE POWER GENERATING CIRCUIT AND ELECTRONIC CIRCUIT USING THE SAME
    4.
    发明申请
    REFERENCE POWER GENERATING CIRCUIT AND ELECTRONIC CIRCUIT USING THE SAME 有权
    参考发电电路和使用该发电电路的电子电路

    公开(公告)号:US20150261234A1

    公开(公告)日:2015-09-17

    申请号:US14287064

    申请日:2014-05-26

    申请人: Muh-Rong Yang

    发明人: Muh-Rong Yang

    IPC分类号: G05F1/46

    CPC分类号: G05F1/468 G05F3/30

    摘要: A reference power generating circuit and an electronic circuit using the same are provided. The reference power generating circuit includes a first bandgap reference circuit and a second bandgap reference circuit. The first bandgap reference circuit is biased by a power voltage to generate a first reference voltage, where the first reference voltage has a first offset. The second bandgap reference circuit is connected to the first bandgap reference circuit in series and receives the first reference voltage generated by the first bandgap reference circuit. The second bandgap reference circuit is biased by the first reference voltage to generate a baseline reference voltage. The baseline reference voltage has a second offset, and the second offset is smaller than the first offset.

    摘要翻译: 提供了参考功率发生电路和使用其的电子电路。 参考功率产生电路包括第一带隙基准电路和第二带隙基准电路。 第一带隙参考电路被电源电压偏置以产生第一参考电压,其中第一参考电压具有第一偏移。 第二带隙基准电路串联连接到第一带隙基准电路,并接收由第一带隙基准电路产生的第一参考电压。 第二带隙基准电路被第一参考电压偏置以产生基准参考电压。 基准参考电压具有第二偏移,第二偏移小于第一偏移。

    COMMUNICATION SYSTEM AND METHODS FOR POWER MANAGEMENT THEREOF
    5.
    发明申请
    COMMUNICATION SYSTEM AND METHODS FOR POWER MANAGEMENT THEREOF 审中-公开
    通信系统及其电源管理方法

    公开(公告)号:US20080117848A1

    公开(公告)日:2008-05-22

    申请号:US11753532

    申请日:2007-05-24

    IPC分类号: G08C17/00

    摘要: A method for power management in a communication system is disclosed. The communication system is capable of operating in a first mode, and comprises at least one device having first module corresponding to the first mode. The device can be configured to a normal mode or a power saving mode. First, map data is retrieved from frame data, in which the map data indicates a first time point corresponding to the first mode. Then, when the communication system operates in the first mode, the first module of the device is determined to be configured to the normal mode or the power saving mode according to the first time point.

    摘要翻译: 公开了一种通信系统中的电力管理方法。 通信系统能够以第一模​​式操作,并且包括具有对应于第一模式的第一模块的至少一个设备。 该设备可以配置为正常模式或省电模式。 首先,从帧数据检索地图数据,其中地图数据表示与第一模式对应的第一时间点。 然后,当通信系统在第一模式下工作时,根据第一时间点确定设备的第一模块被配置为正常模式或省电模式。

    Multiple channel ATM switch
    6.
    发明授权
    Multiple channel ATM switch 失效
    多信道ATM交换机

    公开(公告)号:US5987028A

    公开(公告)日:1999-11-16

    申请号:US854394

    申请日:1997-05-12

    摘要: A system and method are provided for routing received cells through a switch fabric. A plurality of output channels are organized into a plurality of channel groups, wherein each of the channels groups is associated with one or more unique output ports of a Benes network. A plurality of cells destined to one or more of the plurality of channel groups is received at plural input queues. A different output port of the Benes network is selected for one or more of the input queues that contains a cell. Then, one cell is switched from each of one or more input queues through the Benes network to the respective selected output port.

    摘要翻译: 提供了一种用于通过交换结构路由接收的小区的系统和方法。 多个输出通道被组织成多个通道组,其中每个通道组与Benes网络的一个或多个唯一的输出端口相关联。 在多个输入队列处接收多个指向多个信道组中的一个或多个信道组的小区。 为包含单元格的一个或多个输入队列选择Benes网络的不同输出端口。 然后,通过Benes网络将一个单元从一个或多个输入队列中的每一个切换到相应的选择的输出端口。

    CURRENT SENSING MODULE AND POWER CONVERSION APPARATUS AND ELECTRONIC APPARATUS USING THE SAME
    8.
    发明申请
    CURRENT SENSING MODULE AND POWER CONVERSION APPARATUS AND ELECTRONIC APPARATUS USING THE SAME 有权
    电流传感器和电源转换装置及其使用的电子设备

    公开(公告)号:US20160344290A1

    公开(公告)日:2016-11-24

    申请号:US14829655

    申请日:2015-08-19

    IPC分类号: H02M3/158 G01R15/14 G01R19/00

    摘要: A current sensing module and a power conversion apparatus and an electronic apparatus using the same are provided. The current sensing module is suitable for detecting a first load current flowing through a first load. The current sensing module includes a sampling stage circuit and an output stage circuit. The sampling stage circuit couples across the first load and selectively exchanges coupling nodes between the sampling stage circuit and the first load by a multiplex switching means, so as to sample the first load current flowing along a first direction or a second direction, and thus generate a sampling signal. The output stage circuit is coupled to the sampling stage circuit and switches coupling nodes between the output stage circuit and the output terminal of the sampling stage circuit, so as to generate a current indication signal indicating the magnitude of the first load current according to the sampling signal.

    摘要翻译: 提供了一种电流感测模块和电力转换装置以及使用它的电子设备。 电流检测模块适用于检测流经第一负载的第一负载电流。 电流检测模块包括采样级电路和输出级电路。 采样级电路跨越第一负载耦合,并通过多路开关装置选择性地交换采样级电路和第一负载之间的耦合节点,以便对沿着第一方向或第二方向流动的第一负载电流进行采样,从而产生 采样信号。 输出级电路耦合到采样级电路并切换输出级电路和采样级电路的输出端之间的耦合节点,以便根据采样产生指示第一负载电流大小的电流指示信号 信号。

    Transmission method and multiple input multiple output wireless communication system using the same
    9.
    发明授权
    Transmission method and multiple input multiple output wireless communication system using the same 有权
    传输方式和多输入多输出无线通信系统使用相同

    公开(公告)号:US08254489B2

    公开(公告)日:2012-08-28

    申请号:US12406948

    申请日:2009-03-18

    CPC分类号: H04B7/0426

    摘要: A transmission method executed in a multiple input multiple output wireless communication system may include the following steps: receiving a transmitting bit sequence; providing an X level pulse amplitude modulation (X-PAM) signal set, wherein distances between any two adjacent signal points in the X-PAM are the same; generating M signal sets according to the X-PAM signal set, wherein the ith signal set is formed by multiplying the X-PAM signal set with a parameter (1/X)(i−1), wherein i is an integer from 1 to M, and generating a X-PAM signal set joint coding/decoding table according a superposition result of the M signal sets; generating M transmitting bit sub-sequences according to the transmitting bit sequence; generating M transmitting signals according to the M transmitting bit sub-sequences and the X-PAM signal set joint coding/decoding table; transmitting the M transmitting signals to a wireless transmission channel via M transmitting antennae.

    摘要翻译: 在多输入多输出无线通信系统中执行的发送方法可以包括以下步骤:接收发送比特序列; 提供X级脉冲幅度调制(X-PAM)信号组,其中X-PAM中任意两个相邻信号点之间的距离相同; 根据X-PAM信号组生成M个信号组,其中第i个信号组是通过将X-PAM信号集合与参数(1 / X)(i-1)相乘形成的,其中i是从1到 M,并根据M个信号集合的叠加结果生成X-PAM信号集合编码/解码表; 根据发送比特序列产生M个发送比特子序列; 根据M个发送比特子序列和X-PAM信号集合编码/解码表生成M个发送信号; 通过M个发送天线将M个发送信号发送到无线传输信道。

    Distribution network switch for very large gigabit switching architecture
    10.
    发明授权
    Distribution network switch for very large gigabit switching architecture 失效
    配电网络交换机用于非常大的千兆交换架构

    公开(公告)号:US5856977A

    公开(公告)日:1999-01-05

    申请号:US856557

    申请日:1997-05-15

    IPC分类号: H04L12/56 H04L12/28

    摘要: An inventive switch for transporting information cells without cell contention is described. The switch includes at least one parallel distribution network. Each distribution network includes an N.times.N first routing network for receiving cells at a plurality of input ports, where N equals the number the input ports. Illustratively, the routing network is self-routing and non-blocking, such as a Banyan Network. Connected to the N.times.N network are .rho..sup.k groups of shared buffers for storing the cells routed through the network for a period of time not greater than one cell cycle, where k is incremented from 1 to �log.sub.2 N/log.sub.2 .rho.!.sup.-1 and .rho. equals a predetermined speed-up factor. In one aspect of this embodiment, the number of shared buffers is simply equal to N/.rho.. To prevent cell contention and cell loss, all of the contentious cells (cells destined for the same output during the same cycle) are stored in the same shared buffer. Connected to the shared buffers are .rho..sup.k groups of (N/.rho..sup.k).times.(N/.rho..sup.k) routing networks each having a plurality of output ports for outputting the cells, stored in the shared buffers, based on the destination addresses of each cell. Due in part to the utilization of .rho..sup.k groups of shared buffers, a large reduction in both hardware costs and chip real estate is realized. Specifically, a decrease in the number of switching stages is achieved.

    摘要翻译: 描述了用于在没有信元争用的情况下传送信息单元的本发明的开关。 交换机包括至少一个并行分发网络。 每个分配网络包括用于在多个输入端口处接收小区的NxN第一路由网络,其中N等于输入端口的数量。 说明性地,路由网络是自路由和非阻塞的,例如Banyan网络。 连接到NxN网络是共享缓冲器组,用于存储经由网络路由的小区不超过一个小区周期,其中k从1增加到[log2N / log2rho] -1,rho等于 预定的加速因子。 在该实施例的一个方面,共享缓冲器的数量简单地等于N / rho。 为了防止信元争用和信元丢失,所有有争议的信元(在相同周期期间注定为相同输出的信元)被存储在相同的共享缓冲器中。 连接到共享缓冲器的是(N / rho k)x(N / rho k)路由网络的rho k组,每个路由网络具有多个输出端口,用于基于每个的目的地地址存储在共享缓冲器中的单元 细胞。 部分由于使用rhok组的共享缓冲区,实现了硬件成本和芯片空间的大幅度降低。 具体地说,实现了切换级数的减少。