发明授权
- 专利标题: Low-temperature post-dopant activation process
- 专利标题(中): 低温后掺杂剂激活过程
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申请号: US09983625申请日: 2001-10-25
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公开(公告)号: US06902966B2公开(公告)日: 2005-06-07
- 发明人: Bin Yu , Robert B. Ogle , Eric N. Paton , Cyrus E. Tabery , Qi Xiang
- 申请人: Bin Yu , Robert B. Ogle , Eric N. Paton , Cyrus E. Tabery , Qi Xiang
- 申请人地址: US CA Sunnyvale
- 专利权人: Advanced Micro Devices, Inc.
- 当前专利权人: Advanced Micro Devices, Inc.
- 当前专利权人地址: US CA Sunnyvale
- 主分类号: H01L21/28
- IPC分类号: H01L21/28 ; H01L21/20 ; H01L21/265 ; H01L21/268 ; H01L21/336 ; H01L29/417 ; H01L29/78 ; H01L21/00
摘要:
A method of manufacturing a MOSFET semiconductor device comprises forming a gate electrode over a substrate and a gate oxide between the gate electrode and the substrate; forming source/drain extensions in the substrate; forming first and second sidewall spacers; implanting dopants within the substrate to form source/drain regions in the substrate adjacent to the sidewalls spacers; laser thermal annealing to activate the source/drain regions; depositing a layer of nickel over the source/drain regions; and annealing to form a nickel silicide layer disposed on the source/drain regions. The source/drain extensions and sidewall spacers are adjacent to the gate electrode. The source/drain extensions can have a depth of about 50 to 300 angstroms, and the source/drain regions can have a depth of about 400 to 1000 angstroms. The annealing is at temperatures from about 350 to 500° C.
公开/授权文献
- US20030082880A1 Low-temperature post-dopant activation process 公开/授权日:2003-05-01
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