A system and method for coupling read data signals and write data signals through I/O lines of a memory array. Precharge circuits precharge alternating signal lines to high and low precharge voltages. An accelerate high circuit coupled to each of the I/O lines that has been precharged low detects an increase in the voltage of the I/O line above the precharge low voltage. The accelerate high circuit then drives the I/O line toward a high voltage, such as VCC. Similarly, an accelerate low circuit coupled to each of the I/O lines that has been precharged high detects a decrease in the voltage of the I/O line below the precharge high voltage. The accelerate low circuit then drives the I/O line to a low voltage, such as ground.