发明授权
US06928647B2 Method and apparatus for controlling the processing priority between multiple threads in a multithreaded processor
失效
用于控制多线程处理器中的多个线程之间的处理优先级的方法和装置
- 专利标题： Method and apparatus for controlling the processing priority between multiple threads in a multithreaded processor
- 专利标题（中）： 用于控制多线程处理器中的多个线程之间的处理优先级的方法和装置
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申请号： US10365918申请日： 2003-02-13
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公开(公告)号： US06928647B2公开(公告)日： 2005-08-09
- 发明人: David J. Sager
- 申请人： David J. Sager
- 申请人地址： US CA Santa Clara
- 专利权人： Intel Corporation
- 当前专利权人： Intel Corporation
- 当前专利权人地址： US CA Santa Clara
- 代理机构： Blakely, Sokoloff, Taylor & Zafman LLP
- 主分类号： G06F9/48
- IPC分类号： G06F9/48 ; G06F15/16
摘要：
The present invention provides a method and apparatus for controlling a processing priority assigned alternately to a first thread and a second thread in a multithreaded processor to prevent deadlock and livelock problems between the first thread and the second thread. In one embodiment, the processing priority is initially assigned to the first thread for a first duration. It is then determined whether the first duration has expired in a given processing cycle. If the first duration has expired, the processing priority is assigned to the second thread for a second duration.
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