发明授权
- 专利标题: One-chip microcomputer and control method thereof as well as an IC card having such a one-chip microcomputer
- 专利标题(中): 单片机及其控制方法以及具有这种单片微型计算机的IC卡
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申请号: US09568683申请日: 2000-05-11
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公开(公告)号: US06934884B1公开(公告)日: 2005-08-23
- 发明人: Masaki Wakabayashi , Kazuhiro Yaegawa , Masaaki Tanno , Hiroki Suto , Tadao Takeda
- 申请人: Masaki Wakabayashi , Kazuhiro Yaegawa , Masaaki Tanno , Hiroki Suto , Tadao Takeda
- 申请人地址: JP Osaka JP Osaka
- 专利权人: Sharp Kabushiki Kaisha,Nippon Telegraph and Telephone Corporation
- 当前专利权人: Sharp Kabushiki Kaisha,Nippon Telegraph and Telephone Corporation
- 当前专利权人地址: JP Osaka JP Osaka
- 代理机构: Birch, Stewart, Kolasch & Birch, LLP.
- 优先权: JP11-130297 19990511; JP2000-106954 20000407
- 主分类号: G06K19/07
- IPC分类号: G06K19/07 ; G01R31/3183 ; G06F11/22 ; G06F11/26 ; G06F11/267 ; G06F15/78 ; G06F11/00
摘要:
In order to provide a built-in self testing function, a one-chip microcomputer is equipped with an activation register for activating the test operation and a built-in self test activation pattern generator for setting initial values at test control circuits (pseudo random number generator, logical circuit testing compressor, pattern generator, and memory testing compressor). In accordance with an instruction from the CPU, a built-in self test is activated so that the results of tests of the memory and the group of logical circuits are read from the memory testing compressor and the logical circuit testing compressor, and respectively compared with expected values preliminarily stored in the memory in the one-chip microcomputer; thus, the results are diagnosed. Thus, it is possible to carry out a built-in self test without using a plurality of exclusively-used test terminals.
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