Invention Grant
- Patent Title: Input buffer circuit
- Patent Title (中): 输入缓冲电路
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Application No.: US10694966Application Date: 2003-10-28
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Publication No.: US06943585B2Publication Date: 2005-09-13
- Inventor: Jae Jin Lee , Kang Seol Lee
- Applicant: Jae Jin Lee , Kang Seol Lee
- Applicant Address: KR Kyoungki-do
- Assignee: Hynix Semiconductor Inc.
- Current Assignee: Hynix Semiconductor Inc.
- Current Assignee Address: KR Kyoungki-do
- Agency: Ladas & Parry LLP
- Priority: KR10-2002-0066511 20021030
- Main IPC: H03K19/018
- IPC: H03K19/018 ; G11C7/10 ; H03K19/00 ; H03K19/0948

Abstract:
Disclosed is an input apparatus used in a SSTL interface, which comprises a differential buffer for comparing an external input signal with a reference potential inputted from an external, and a CMOS buffer for buffering the external input signal. In the input apparatus, the CMOS buffer operates when a command signal or an address signal is not inputted from an external, and when a predetermined operation such as a refresh operation is performed, thereby reducing the power consumption in a standby mode. Further, in order to prevent the input apparatus from abnormally operating when the reference potential is not maintained in the normal operation range, a reference potential level detecting circuit is further included in the input apparatus, so that the CMOS buffer operates when the reference potential deviates from a predetermined normal operation range. Furthermore, in order to enable an input buffer to operate as the CMOS when an input signal fully swings, a circuit for detecting a potential of an input signal inputted from an external is further included in the input apparatus.
Public/Granted literature
- US20040090242A1 Input buffer circuit Public/Granted day:2004-05-13
Information query
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