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US06954912B2 Error detection in dynamic logic circuits 失效
动态逻辑电路中的错误检测

Error detection in dynamic logic circuits
摘要:
Error detection apparatus and methods for dynamic logic are provided. Circuit errors are detected by comparing true and complement signals to ensure they are in fact complementary signals. A pseudocomplement technique is used to implement an adder in which distinct logic cones generate the true and complement carry signals. Other embodiments comprising additional features, such as shared logic cone decomposition, are also provided.
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