Invention Grant
- Patent Title: Arbitration scheme for efficient parallel processing
- Patent Title (中): 有效的并行处理仲裁方案
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Application No.: US10085432Application Date: 2002-02-28
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Publication No.: US06963342B2Publication Date: 2005-11-08
- Inventor: Mark E. Pascual , Michael G. Lavelle , Nandini Ramani , Patrick Shehane
- Applicant: Mark E. Pascual , Michael G. Lavelle , Nandini Ramani , Patrick Shehane
- Applicant Address: US CA Santa Clara
- Assignee: Sun Microsystems, Inc.
- Current Assignee: Sun Microsystems, Inc.
- Current Assignee Address: US CA Santa Clara
- Agency: Meyertons Hood Kivlin Kowert & Goetzel, P.C.
- Agent Jeffrey C. Hood
- Main IPC: G06F9/38
- IPC: G06F9/38 ; G06F15/78 ; G06T1/20

Abstract:
A system and method for assigning operations to multiple pipelines in a graphics system is disclosed. The graphics system may include an arbitration unit coupled to a plurality of calculation pipelines. The arbitration unit is operable to provide graphics operations to selected ones of the calculation pipelines. Each of the calculation pipelines is operable to perform a graphics operation. Each of the calculation pipelines may include digital logic and/or a processing element for performing the graphics operations. An operation may be assigned to a pipeline if the pipeline is performing a low latency operation. A low latency operation may comprise an operation that is performed by one of the calculation pipelines in less time than a pre-determined number of clock cycles.
Public/Granted literature
- US20030160794A1 Arbitration scheme for efficient parallel processing Public/Granted day:2003-08-28
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