发明授权
- 专利标题: Tuner circuit
- 专利标题(中): 调谐电路
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申请号: US10706086申请日: 2003-11-13
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公开(公告)号: US06977555B2公开(公告)日: 2005-12-20
- 发明人: Sadao Kotera , Hiroshi Taniguchi
- 申请人: Sadao Kotera , Hiroshi Taniguchi
- 申请人地址: JP Kyoto
- 专利权人: Murata Manufacturing Co., Ltd.
- 当前专利权人: Murata Manufacturing Co., Ltd.
- 当前专利权人地址: JP Kyoto
- 代理机构: Keating & Bennett, LLP
- 优先权: JP2002-365512 20021217
- 主分类号: H04B1/16
- IPC分类号: H04B1/16 ; H03F3/191 ; H03G1/00 ; H03G3/30 ; H04B1/18
摘要:
A tuner circuit includes a variable attenuator circuit including a PIN diode, disposed upstream of a variable-gain amplifier circuit and controlled according to the same AGC voltage used to control the variable-gain amplifier circuit. The operations of the variable-gain amplifier circuit and the variable attenuator circuit in relation to the AGC voltage are set such that when an input RF signal is at a maximum assumed level, a direct current that flows through the PIN diode will be less than a value of a direct current that maximizes intermodulation distortion.
公开/授权文献
- US20040113702A1 Tuner circuit 公开/授权日:2004-06-17