Invention Grant
- Patent Title: Digital timing recovery method for communication receivers
- Patent Title (中): 通信接收机的数字定时恢复方法
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Application No.: US09941002Application Date: 2001-08-28
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Publication No.: US06983032B2Publication Date: 2006-01-03
- Inventor: Fernando A. Mujica , Udayan Dasgupta , Sandeep Kesrimal Oswal , Murtaza Ali , Pradeep Kiran Sarvepalli , Prakash Easwaran , Diptendra Narayan Basu
- Applicant: Fernando A. Mujica , Udayan Dasgupta , Sandeep Kesrimal Oswal , Murtaza Ali , Pradeep Kiran Sarvepalli , Prakash Easwaran , Diptendra Narayan Basu
- Applicant Address: US TX Dallas
- Assignee: Texas Instruments Incorporated
- Current Assignee: Texas Instruments Incorporated
- Current Assignee Address: US TX Dallas
- Agent Abdul Zindani; W. James Brady, III; Frederick J. Telecky, Jr.
- Main IPC: H03D3/24
- IPC: H03D3/24

Abstract:
The present invention provides an apparatus, system and method for synchronizing a local clock signal with a remote clock signal in a communication network. Phase information is used to calculate a number of “clock jitters” per unit of time needed to synchronize the locally generated clock with the remote clock. Introducing (removing) a given amount of delay at a particular point in the local clock signal results in a positive (negative) jitter in which its minimum value defines the jitter resolution. The jitters are introduced to the local clock signal from a plurality of tapped delay line elements (310) selected by a phase selector (350) in response to a timing correction signal issued by a phase error module (520).
Public/Granted literature
- US20030043945A1 Digital timing recovery method for communication receivers Public/Granted day:2003-03-06
Information query
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