发明授权
US06984844B2 Semiconductor device having heterojunction type MIS transistor which can operate at reduced voltage while maintaining high operation speed
有权
具有异质结型MIS晶体管的半导体器件可以在降低的电压下工作,同时保持较高的操作速度
- 专利标题: Semiconductor device having heterojunction type MIS transistor which can operate at reduced voltage while maintaining high operation speed
- 专利标题(中): 具有异质结型MIS晶体管的半导体器件可以在降低的电压下工作,同时保持较高的操作速度
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申请号: US10657799申请日: 2003-09-09
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公开(公告)号: US06984844B2公开(公告)日: 2006-01-10
- 发明人: Takeshi Takagi
- 申请人: Takeshi Takagi
- 申请人地址: JP Osaka
- 专利权人: Matsushita Electric Industrial Co., Ltd.
- 当前专利权人: Matsushita Electric Industrial Co., Ltd.
- 当前专利权人地址: JP Osaka
- 代理机构: McDermott Will & Emery LLP
- 优先权: JP2002-011833 20020121
- 主分类号: H01L29/06
- IPC分类号: H01L29/06 ; H01L31/0328 ; H01L31/0336 ; H01L31/072 ; H01L31/109
摘要:
A semiconductor device according to the invention includes: a semiconductor layer (10–15); a gate insulator (16) provided on the semiconductor layer; a gate electrode (17) provided on the gate insulator; a source region (20a) and a drain region (20b), which are of a first conductivity type and are provided in the semiconductor layer on both sides of the gate electrode in plan view; a cap layer (25), a channel region (24), and an under-channel region (23,22), which are of a second conductivity type and are provided in the semiconductor layer between the source region and the drain region in a descending order from an interface with the gate insulator; and a bias electrode member (Vbs) for applying a voltage to the under-channel region, wherein the channel region is formed of a first semiconductor, the cap layer and the under-channel region are formed of a second semiconductor and a third semiconductor, respectively, each of which has a larger band gap than the first semiconductor, the bias electrode member is capable of applying the voltage independently of the gate electrode.
公开/授权文献
- US20040094811A1 Semiconductor device 公开/授权日:2004-05-20
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