- 专利标题: Data-directed frequency-and-phase lock loop
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申请号: US10404511申请日: 2003-04-01
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公开(公告)号: US06995617B2公开(公告)日: 2006-02-07
- 发明人: Richard W. Citta , Scott M. LoPresto , Jingsong Xia , Wenjun Zhang
- 申请人: Richard W. Citta , Scott M. LoPresto , Jingsong Xia , Wenjun Zhang
- 申请人地址: US IL Palatine
- 专利权人: Micronas Semiconductors, Inc.
- 当前专利权人: Micronas Semiconductors, Inc.
- 当前专利权人地址: US IL Palatine
- 代理机构: O'Shea, Getz & Kosakowski, P.C.
- 主分类号: H03L7/00
- IPC分类号: H03L7/00
摘要:
A data-directed frequency-and-phase lock loop for an offset-QAM modulated signal comprises a first multiplier that multiplies the signal by the output of a VCO. The output of the first multiplier is phase-shifted by a second multiplier, then convolved by a third multiplier. The output of the third multiplier is split, with each portion being passed through a frequency-shift multiplier and a frequency-and-phase lock loop. The output of the two frequency-and-phase lock loops is summed and returned to the VCO to complete the feedback loop.
公开/授权文献
- US20030215044A1 Data-directed frequency-and-phase lock loop 公开/授权日:2003-11-20
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