发明授权
- 专利标题: Multiple coprocessor architecture to process a plurality of subtasks in parallel
- 专利标题(中): 多个协处理器架构并行处理多个子任务
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申请号: US09751943申请日: 2000-12-28
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公开(公告)号: US07007156B2公开(公告)日: 2006-02-28
- 发明人: Gavin J. Stark , John Wishneusky
- 申请人: Gavin J. Stark , John Wishneusky
- 申请人地址: US CA Santa Clara
- 专利权人: Intel Corporation
- 当前专利权人: Intel Corporation
- 当前专利权人地址: US CA Santa Clara
- 代理机构: Blakley, Sokoloff, Taylor & Zafman LLP
- 主分类号: G06F9/00
- IPC分类号: G06F9/00
摘要:
A programmed state processing machine architecture and method that provides improved efficiency for processing data manipulation tasks. In one embodiment, the processing machine comprises a control engine and a plurality coprocessors, a data memory, and an instruction memory. A sequence of instructions having a plurality of portions are issued by the instruction memory, wherein the control engine and each of the processors is caused to perform a specific task based on the portion of the instructions designated for that component. Accordingly, a data manipulation task can be divided into a plurality of subtasks that are processed in parallel by respective processing components in the architecture.
公开/授权文献
- US20020087827A1 Architecture of psm-mpus and coprocessors 公开/授权日:2002-07-04
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