发明授权
US07015090B2 Method of manufacturing a semiconductor device having trenches for isolation and capacitor formation trenches
有权
制造具有用于隔离沟槽和电容器形成沟槽的半导体器件的方法
- 专利标题： Method of manufacturing a semiconductor device having trenches for isolation and capacitor formation trenches
- 专利标题（中）： 制造具有用于隔离沟槽和电容器形成沟槽的半导体器件的方法
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申请号： US10408353申请日： 2003-04-08
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公开(公告)号： US07015090B2公开(公告)日： 2006-03-21
- 发明人: Tsutomu Okazaki , Daisuke Okada , Yoshihiro Ikeda , Keisuke Tsukamoto , Tatsuya Fukumura , Shoji Shukuri , Keiichi Haraguchi , Koji Kishi
- 申请人： Tsutomu Okazaki , Daisuke Okada , Yoshihiro Ikeda , Keisuke Tsukamoto , Tatsuya Fukumura , Shoji Shukuri , Keiichi Haraguchi , Koji Kishi
- 申请人地址： JP Tokyo
- 专利权人： Renesas Technology Corp.
- 当前专利权人： Renesas Technology Corp.
- 当前专利权人地址： JP Tokyo
- 代理机构： Antonelli, Terry, Stout and Kraus, LLP.
- 优先权： JP2002-114967 20020417
- 主分类号： H01L21/8248
- IPC分类号： H01L21/8248
摘要：
At least not less than one capacitor formation trench providing an uneven surface is formed on the surface of a capacitor formation region. Thus, the surface area of a capacitor is increased, which enables improvement of the capacitance of the capacitor per unit area. Further, by forming the capacitor formation trench and an element formation trench that are formed in the surface of the semiconductor substrate by the same step, it is possible to simplify the manufacturing process. Whereas, a dielectric film of the capacitor in the capacitor formation region and a high-voltage gate insulating film in a MISFET formation region are formed by the same step; alternatively, the dielectric film of the capacitor in the capacitor formation region and a memory gate interlayer film between a polysilicon layer and a polysilicon layer in the memory cell formation region are formed by the same step.
公开/授权文献
- US20040038492A1 Method of manufacturing a semiconductor device 公开/授权日：2004-02-26
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