Invention Grant
- Patent Title: High-speed sampling architectures
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Application No.: US11033661Application Date: 2005-01-12
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Publication No.: US07015842B1Publication Date: 2006-03-21
- Inventor: Sandeep Kumar Gupta , Oleksiy Zabroda
- Applicant: Sandeep Kumar Gupta , Oleksiy Zabroda
- Applicant Address: US CA Santa Clara
- Assignee: Teranetics, Inc.
- Current Assignee: Teranetics, Inc.
- Current Assignee Address: US CA Santa Clara
- Agent Brian R. Short
- Main IPC: H03M1/00
- IPC: H03M1/00

Abstract:
A high-speed sampling system and an analog to digital converter are disclosed. One embodiment of a method of sampling a signal includes receiving an analog signal and generating first samples at a rate of Fs, and generating second sub-samples from the first samples at a rate of Fs/N and having a relative phase of approximately (360/N)*(i−1) degrees, where i varies from 1 to N. In a first embodiment, at most two second sub-samplers are tracking the output of the first sampler at any point in time. In a second embodiment, only one of the N second sub-samplers are tracking the output of the first sampler at any point in time. A third embodiment further includes generating third samples from the second samples at a rate of Fs/N, and having a relative phase of approximately ((360/N)*(i−1)+180) degrees. A method of interleaved analog to digital converting includes corresponding time interleaved ADCs receiving the third samples.
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