- 专利标题: High-speed sampling architectures
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申请号: US11033661申请日: 2005-01-12
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公开(公告)号: US07015842B1公开(公告)日: 2006-03-21
- 发明人: Sandeep Kumar Gupta , Oleksiy Zabroda
- 申请人: Sandeep Kumar Gupta , Oleksiy Zabroda
- 申请人地址: US CA Santa Clara
- 专利权人: Teranetics, Inc.
- 当前专利权人: Teranetics, Inc.
- 当前专利权人地址: US CA Santa Clara
- 代理商 Brian R. Short
- 主分类号: H03M1/00
- IPC分类号: H03M1/00
摘要:
A high-speed sampling system and an analog to digital converter are disclosed. One embodiment of a method of sampling a signal includes receiving an analog signal and generating first samples at a rate of Fs, and generating second sub-samples from the first samples at a rate of Fs/N and having a relative phase of approximately (360/N)*(i−1) degrees, where i varies from 1 to N. In a first embodiment, at most two second sub-samplers are tracking the output of the first sampler at any point in time. In a second embodiment, only one of the N second sub-samplers are tracking the output of the first sampler at any point in time. A third embodiment further includes generating third samples from the second samples at a rate of Fs/N, and having a relative phase of approximately ((360/N)*(i−1)+180) degrees. A method of interleaved analog to digital converting includes corresponding time interleaved ADCs receiving the third samples.
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