发明授权
US07023372B1 Method and apparatus for segmented, switched analog/digital converter
有权
用于分段,开关模拟/数字转换器的方法和装置
- 专利标题: Method and apparatus for segmented, switched analog/digital converter
- 专利标题(中): 用于分段,开关模拟/数字转换器的方法和装置
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申请号: US11054064申请日: 2005-02-09
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公开(公告)号: US07023372B1公开(公告)日: 2006-04-04
- 发明人: Ramesh Singh , Eamonn Byrne , Asif Ahmad , Srikanth Nittala , Shubha Govindachar
- 申请人: Ramesh Singh , Eamonn Byrne , Asif Ahmad , Srikanth Nittala , Shubha Govindachar
- 申请人地址: US MA Norwood
- 专利权人: Analog Devices, Inc.
- 当前专利权人: Analog Devices, Inc.
- 当前专利权人地址: US MA Norwood
- 代理机构: Global IP Services, PLLC
- 代理商 Prakash Nama
- 主分类号: H03M1/12
- IPC分类号: H03M1/12
摘要:
A switched-capacitor circuit for use in analog-to-digital conversion samples an input signal with respect to a reference voltage such that it significantly reduces a DAC settling time interval during each bit trial. In one exemplary embodiment, the switched-capacitor circuit having first and second groups of capacitor banks is coupled to a first input of a comparator and to a control circuit which provides control signals such that during a switching sequence, an equal value of capacitance is selected from each of the first and second groups of capacitor banks to reduce the DAC settling time interval, thereby improving the conversion rate.