Invention Grant
- Patent Title: Method for forming polycrystalline silicon thin film transistor
- Patent Title (中): 多晶硅薄膜晶体管的形成方法
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Application No.: US11085953Application Date: 2005-03-22
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Publication No.: US07026201B2Publication Date: 2006-04-11
- Inventor: Kyoung Seok Son , Myung Kwan Ryu , Jae Chul Park , Eok Su Kim , Jun Ho Lee , Se Yeoul Kwon , Jang Soon Im
- Applicant: Kyoung Seok Son , Myung Kwan Ryu , Jae Chul Park , Eok Su Kim , Jun Ho Lee , Se Yeoul Kwon , Jang Soon Im
- Applicant Address: KR Kyoungki-do
- Assignee: Boe Hydis Technology Co., Ltd
- Current Assignee: Boe Hydis Technology Co., Ltd
- Current Assignee Address: KR Kyoungki-do
- Agency: Seyfarth Shaw LLP
- Agent Timothy J Keefer
- Priority: KR10-2004-0071602 20040908
- Main IPC: H01L21/336
- IPC: H01L21/336

Abstract:
A method for forming a polycrystalline silicon thin film transistor. The method includes the steps of: forming a polycrystalline silicon layer including multiple protrusions by crystallizing the amorphous silicon layer according to a crystallization method in which the multiple protrusions are formed due to collision between crystal grains; patterning the polycrystalline silicon layer in an active pattern which includes only two protrusions of the multiple protrusions, which are apart from each other and located at both sides of a gate electrode-forming area; applying a barrier layer on the patterned polycrystalline silicon layer while partially covering the two protrusions; and forming a source electrode and a drain electrode at the protrusions of the polycrystalline silicon layer formed at both sides of the gate electrode-forming area by ion-implanting dopants into a resultant lamination.
Public/Granted literature
- US20060051904A1 METHOD FOR FORMING POLYCRYSTALLINE SILICON THIN FILM TRANSISTOR Public/Granted day:2006-03-09
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