发明授权
- 专利标题: Mask network design for scan-based integrated circuits
- 专利标题(中): 基于扫描的集成电路的掩模网络设计
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申请号: US10876784申请日: 2004-06-28
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公开(公告)号: US07032148B2公开(公告)日: 2006-04-18
- 发明人: Laung-Terng (L.-T.) Wang , Shun-Miin (Sam) Wang , Khader S. Abdel-Hafez , Xiaoqing Wen , Boryau (Jack) Sheu
- 申请人: Laung-Terng (L.-T.) Wang , Shun-Miin (Sam) Wang , Khader S. Abdel-Hafez , Xiaoqing Wen , Boryau (Jack) Sheu
- 申请人地址: US CA Sunnyvale
- 专利权人: Syntest Technologies, Inc.
- 当前专利权人: Syntest Technologies, Inc.
- 当前专利权人地址: US CA Sunnyvale
- 代理商 Jim Zegeer
- 主分类号: G01R31/3177
- IPC分类号: G01R31/3177 ; G01R31/3181 ; G01R31/3185
摘要:
A method and apparatus for selectively masking off unknown (‘x’) captured scan data in first selected scan cells 220 from propagating through the scan chains 221 for test, debug, diagnosis, and yield improvement of a scan-based integrated circuit 207 in a selected scan-test mode 232 or selected self-test mode. The scan-based integrated circuit 207 contains a plurality of scan chains 221, a plurality of pattern generators 208, a plurality of pattern compactors 213, with each scan chain 221 comprising multiple scan cells 220, 222 coupled in series. The method and apparatus further includes an output-mask controller 211 and an output-mask network 212 embedded on the scan data input path of second selected scan cells 222, or a set/reset controller controlling selected set/reset inputs of second selected scan cells. A synthesis method is also proposed for synthesizing the output-mask controller 211 and the set/reset controller.
公开/授权文献
- US20050060625A1 Mask network design for scan-based integrated circuits 公开/授权日:2005-03-17
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