- 专利标题: Error correction method and apparatus for data transmission system
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申请号: US10001712申请日: 2002-03-11
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公开(公告)号: US07035365B2公开(公告)日: 2006-04-25
- 发明人: Hiroshi Takatori , James M. Little , Scott Chiu
- 申请人: Hiroshi Takatori , James M. Little , Scott Chiu
- 申请人地址: US CA Santa Clara
- 专利权人: Intel Corporation
- 当前专利权人: Intel Corporation
- 当前专利权人地址: US CA Santa Clara
- 代理机构: Pillsbury Winthrop Shaw Pittman LLP
- 主分类号: H04L7/00
- IPC分类号: H04L7/00 ; H04L7/02
摘要:
A receiver involved in high-speed data transmission includes a decision system. The decision system calculates a value of an input signal and holds the value as a tentative value. The decision system calculates an error value, amplifies the error value, and holds the amplified error value as a corrected value. The decision system determines whether the amplified error value is within a marginal range. The decision system also determines whether adjacent values to the value indicate the input signal was in transition from a positive to negative state, or a negative to positive state. If the amplified error values is within a marginal range and the input signal was in transition from a positive to negative state, or a negative to positive state, then the decision system overrides the tentative value with the corrected value.
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