Invention Grant
- Patent Title: Photomask defect testing method, photomask manufacturing method and semiconductor integrated circuit manufacturing method
- Patent Title (中): 光掩模缺陷测试方法,光掩模制造方法和半导体集成电路制造方法
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Application No.: US10689666Application Date: 2003-10-22
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Publication No.: US07037627B2Publication Date: 2006-05-02
- Inventor: Eiji Aoki , Shinji Kobayashi , Toshiyuki Marumo , Shinji Akima
- Applicant: Eiji Aoki , Shinji Kobayashi , Toshiyuki Marumo , Shinji Akima
- Applicant Address: JP Osaka JP Tokyo
- Assignee: Sharp Kabushiki Kaisha,Toppan Printing Co., Ltd.
- Current Assignee: Sharp Kabushiki Kaisha,Toppan Printing Co., Ltd.
- Current Assignee Address: JP Osaka JP Tokyo
- Agency: Nixon & Vanderhye P.C.
- Priority: JP2002-311920 20021025
- Main IPC: G01F9/00
- IPC: G01F9/00

Abstract:
The present invention provides a photomask defect testing method, a photomask manufacturing method and a semiconductor integrated circuit manufacturing method. In the photomask defect testing method, reference data is created from corrected photomask design data that is corrected on the basis of an exposure transfer pattern, and sensor data is created by measuring the shape of the photomask based on the corrected photomask design data. Furthermore, first non-testing region data indicating non-testing regions including pattern portions having a predetermined width or less and pattern spaces having a predetermined value or less is extracted from the corrected photomask design data, the extracted first non-testing region data is stored so as to be included in the corrected photomask design data, the non-testing regions indicated by the first non-testing region data is excluded, and the reference data is compared with the sensor data, whereby defects on the photomask are detected.
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