发明授权
US07038222B1 System and method for using areas near photo global alignment marks or unpatterned areas of a semiconductor wafer to create structures for SIMS or E-Beam or XRD testing
有权
使用半导体晶片的照片全局对准标记或未图案化区域附近的区域的系统和方法来创建SIMS或E-Beam或XRD测试的结构
- 专利标题： System and method for using areas near photo global alignment marks or unpatterned areas of a semiconductor wafer to create structures for SIMS or E-Beam or XRD testing
- 专利标题（中）： 使用半导体晶片的照片全局对准标记或未图案化区域附近的区域的系统和方法来创建SIMS或E-Beam或XRD测试的结构
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申请号： US10869681申请日： 2004-06-16
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公开(公告)号： US07038222B1公开(公告)日： 2006-05-02
- 发明人: Thanas Budri , Aaron Michael Smith , Neil Suresh Patel , Loren Charles Krott
- 申请人： Thanas Budri , Aaron Michael Smith , Neil Suresh Patel , Loren Charles Krott
- 申请人地址： US CA Santa Clara
- 专利权人： National Semiconductor Corporation
- 当前专利权人： National Semiconductor Corporation
- 当前专利权人地址： US CA Santa Clara
- 主分类号： H01L21/66
- IPC分类号： H01L21/66 ; G01R31/26
摘要：
A system and method is described for using areas in or near photo global alignment marks or in or near unpatterned areas of a semiconductor wafer to create structures for secondary ion mass spectroscopy (SIMS) testing or electron beam (E-Beam) testing or X-ray diffraction (XRD) testing of the semiconductor wafer. The present invention makes it possible to obtain wafer level information about the front-end processing of the semiconductor wafers. The SIMS/E-Beam/XRD testing measures characteristics such as the dopant content, thickness variations, and defect density of the wafers. The present invention eliminates the need to build individual test structures within product dies and eliminates the need to build scribe line structures near the product dies.