Invention Grant
- Patent Title: Method of forming electrode layers
- Patent Title (中): 电极层形成方法
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Application No.: US11092075Application Date: 2005-03-29
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Publication No.: US07040947B2Publication Date: 2006-05-09
- Inventor: Hideki Ashida , Junichi Hibino , Keisuke Sumida , Mitsuhiro Ohtani , Shinya Fujiwara , Hideki Marunaka , Tadashi Nakagawa
- Applicant: Hideki Ashida , Junichi Hibino , Keisuke Sumida , Mitsuhiro Ohtani , Shinya Fujiwara , Hideki Marunaka , Tadashi Nakagawa
- Applicant Address: JP Osaka
- Assignee: Matsushita Electric Industrial Co., Ltd.
- Current Assignee: Matsushita Electric Industrial Co., Ltd.
- Current Assignee Address: JP Osaka
- Priority: JP2000-260420 20000830
- Main IPC: H01J9/00
- IPC: H01J9/00

Abstract:
A method of manufacturing at least two layer electrodes that can be utilized, for example, as bus and data electrodes in a plasma display device, includes depositing each layer in a coating step and subsequently exposing the layers at the same time for development. The layers are subsequently baked at the same time. One layer can be thinner than the other layer during a time period between the developing step and the baking step.
Public/Granted literature
- US20050181697A1 Plasma display device and method for manufacturing the same Public/Granted day:2005-08-18
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