Provided is a method for manufacturing a planar buried semiconductor optical amplifier in which a spot size converter with a double-core structure is integrated, comprising the steps of: after growing a lower cladding layer, a lower waveguide layer and an upper cladding layer on a substrate, patterning a portion of thickness of the lower cladding layer, the lower waveguide layer and the upper cladding layer through an etching process using a dielectric layer pattern to form a lower waveguide; growing a planarization layer on the etched portions of the lower cladding layer, the lower waveguide layer and the upper cladding layer to smooth a surface; after removing the dielectric layer pattern, growing a space layer, an upper waveguide layer and a first cladding layer on the overall upper surface; patterning the first cladding layer, the upper waveguide layer and the space layer through the etching process using the dielectric layer pattern to form an upper waveguide having a horizontal taper area; after growing a first current blocking layer on the etched portions of the first cladding layer, the upper waveguide layer and the space layer of the upper waveguide, growing a second current blocking layer on the exposed portion of the first current block layer excluding the dielectric layer pattern; and after removing the dielectric layer pattern, forming a second cladding layer on the overall upper surface, and forming an electrode on the second cladding layer and the substrate, respectively.